Commit e813e650 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'kvm-5.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull KVM updates from Paolo Bonzini:
 "This is the first batch of KVM changes.

  ARM:
   - cleanups and corner case fixes.

  PPC:
   - Bugfixes

  x86:
   - Support for mapping DAX areas with large nested page table entries.

   - Cleanups and bugfixes here too. A particularly important one is a
     fix for FPU load when the thread has TIF_NEED_FPU_LOAD. There is
     also a race condition which could be used in guest userspace to
     exploit the guest kernel, for which the embargo expired today.

   - Fast path for IPI delivery vmexits, shaving about 200 clock cycles
     from IPI latency.

   - Protect against "Spectre-v1/L1TF" (bring data in the cache via
     speculative out of bound accesses, use L1TF on the sibling
     hyperthread to read it), which unfortunately is an even bigger
     whack-a-mole game than SpectreV1.

  Sean continues his mission to rewrite KVM. In addition to a sizable
  number of x86 patches, this time he contributed a pretty large
  refactoring of vCPU creation that affects all architectures but should
  not have any visible effect.

  s390 will come next week together with some more x86 patches"

* tag 'kvm-5.6-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (204 commits)
  x86/KVM: Clean up host's steal time structure
  x86/KVM: Make sure KVM_VCPU_FLUSH_TLB flag is not missed
  x86/kvm: Cache gfn to pfn translation
  x86/kvm: Introduce kvm_(un)map_gfn()
  x86/kvm: Be careful not to clear KVM_VCPU_FLUSH_TLB bit
  KVM: PPC: Book3S PR: Fix -Werror=return-type build failure
  KVM: PPC: Book3S HV: Release lock on page-out failure path
  KVM: arm64: Treat emulated TVAL TimerValue as a signed 32-bit integer
  KVM: arm64: pmu: Only handle supported event counters
  KVM: arm64: pmu: Fix chained SW_INCR counters
  KVM: arm64: pmu: Don't mark a counter as chained if the odd one is disabled
  KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset
  KVM: x86: Use a typedef for fastop functions
  KVM: X86: Add 'else' to unify fastop and execute call path
  KVM: x86: inline memslot_valid_for_gpte
  KVM: x86/mmu: Use huge pages for DAX-backed files
  KVM: x86/mmu: Remove lpage_is_disallowed() check from set_spte()
  KVM: x86/mmu: Fold max_mapping_level() into kvm_mmu_hugepage_adjust()
  KVM: x86/mmu: Zap any compound page when collapsing sptes
  KVM: x86/mmu: Remove obsolete gfn restoration in FNAME(fetch)
  ...
parents ccaaaf6f 4cbc418a

Documentation/powerpc/ultravisor.rst

+60 −0
Original line number Diff line number Diff line
@@ -948,6 +948,66 @@ Use cases 
    up its internal state for this virtual machine.





H_SVM_INIT_ABORT

----------------



    Abort the process of securing an SVM.



Syntax

~~~~~~



.. code-block:: c



	uint64_t hypercall(const uint64_t H_SVM_INIT_ABORT)



Return values

~~~~~~~~~~~~~



    One of the following values:



	* H_PARAMETER 		on successfully cleaning up the state,

				Hypervisor will return this value to the

				**guest**, to indicate that the underlying

				UV_ESM ultracall failed.



	* H_STATE		if called after a VM has gone secure (i.e

				H_SVM_INIT_DONE hypercall was successful).



	* H_UNSUPPORTED		if called from a wrong context (e.g. from a

				normal VM).



Description

~~~~~~~~~~~



    Abort the process of securing a virtual machine. This call must

    be made after a prior call to ``H_SVM_INIT_START`` hypercall and

    before a call to ``H_SVM_INIT_DONE``.



    On entry into this hypercall the non-volatile GPRs and FPRs are

    expected to contain the values they had at the time the VM issued

    the UV_ESM ultracall. Further ``SRR0`` is expected to contain the

    address of the instruction after the ``UV_ESM`` ultracall and ``SRR1``

    the MSR value with which to return to the VM.



    This hypercall will cleanup any partial state that was established for

    the VM since the prior ``H_SVM_INIT_START`` hypercall, including paging

    out pages that were paged-into secure memory, and issue the

    ``UV_SVM_TERMINATE`` ultracall to terminate the VM.



    After the partial state is cleaned up, control returns to the VM

    (**not Ultravisor**), at the address specified in ``SRR0`` with the

    MSR values set to the value in ``SRR1``.



Use cases

~~~~~~~~~



    If after a successful call to ``H_SVM_INIT_START``, the Ultravisor

    encounters an error while securing a virtual machine, either due

    to lack of resources or because the VM's security information could

    not be validated, Ultravisor informs the Hypervisor about it.

    Hypervisor should use this call to clean up any internal state for

    this virtual machine and return to the VM.



H_SVM_PAGE_IN

-------------

Documentation/virt/kvm/api.txt

+9 −0
Original line number Diff line number Diff line
@@ -2196,6 +2196,15 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value: 
arm64 system registers have the following id bit patterns:

  0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>



WARNING:

     Two system register IDs do not follow the specified pattern.  These

     are KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT, which map to

     system registers CNTV_CVAL_EL0 and CNTVCT_EL0 respectively.  These

     two had their values accidentally swapped, which means TIMER_CVAL is

     derived from the register encoding for CNTVCT_EL0 and TIMER_CNT is

     derived from the register encoding for CNTV_CVAL_EL0.  As this is

     API, it must remain this way.



arm64 firmware pseudo-registers have the following bit pattern:

  0x6030 0000 0014 <regno:16>

arch/arm/include/asm/kvm_emulate.h

+24 −3
Original line number Diff line number Diff line
@@ -9,18 +9,29 @@ 


#include <linux/kvm_host.h>

#include <asm/kvm_asm.h>

#include <asm/kvm_mmio.h>

#include <asm/kvm_arm.h>

#include <asm/cputype.h>



/* arm64 compatibility macros */

#define PSR_AA32_MODE_FIQ	FIQ_MODE

#define PSR_AA32_MODE_SVC	SVC_MODE

#define PSR_AA32_MODE_ABT	ABT_MODE

#define PSR_AA32_MODE_UND	UND_MODE

#define PSR_AA32_T_BIT		PSR_T_BIT

#define PSR_AA32_F_BIT		PSR_F_BIT

#define PSR_AA32_I_BIT		PSR_I_BIT

#define PSR_AA32_A_BIT		PSR_A_BIT

#define PSR_AA32_E_BIT		PSR_E_BIT

#define PSR_AA32_IT_MASK	PSR_IT_MASK

#define PSR_AA32_GE_MASK	0x000f0000

#define PSR_AA32_DIT_BIT	0x00200000

#define PSR_AA32_PAN_BIT	0x00400000

#define PSR_AA32_SSBS_BIT	0x00800000

#define PSR_AA32_Q_BIT		PSR_Q_BIT

#define PSR_AA32_V_BIT		PSR_V_BIT

#define PSR_AA32_C_BIT		PSR_C_BIT

#define PSR_AA32_Z_BIT		PSR_Z_BIT

#define PSR_AA32_N_BIT		PSR_N_BIT



unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
@@ -41,6 +52,11 @@ static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v) 
	*__vcpu_spsr(vcpu) = v;

}



static inline unsigned long host_spsr_to_spsr32(unsigned long spsr)

{

	return spsr;

}



static inline unsigned long vcpu_get_reg(struct kvm_vcpu *vcpu,

					 u8 reg_num)

{
@@ -182,6 +198,11 @@ static inline bool kvm_vcpu_dabt_issext(struct kvm_vcpu *vcpu) 
	return kvm_vcpu_get_hsr(vcpu) & HSR_SSE;

}



static inline bool kvm_vcpu_dabt_issf(const struct kvm_vcpu *vcpu)

{

	return false;

}



static inline int kvm_vcpu_dabt_get_rd(struct kvm_vcpu *vcpu)

{

	return (kvm_vcpu_get_hsr(vcpu) & HSR_SRT_MASK) >> HSR_SRT_SHIFT;
@@ -198,7 +219,7 @@ static inline bool kvm_vcpu_dabt_is_cm(struct kvm_vcpu *vcpu) 
}



/* Get Access Size from a data abort */

static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)

static inline unsigned int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)

{

	switch ((kvm_vcpu_get_hsr(vcpu) >> 22) & 0x3) {

	case 0:
@@ -209,7 +230,7 @@ static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu) 
		return 4;

	default:

		kvm_err("Hardware is weird: SAS 0b11 is reserved\n");

		return -EFAULT;

		return 4;

	}

}

arch/arm/include/asm/kvm_host.h

+9 −7
Original line number Diff line number Diff line
@@ -14,7 +14,6 @@ 
#include <asm/cputype.h>

#include <asm/kvm.h>

#include <asm/kvm_asm.h>

#include <asm/kvm_mmio.h>

#include <asm/fpstate.h>

#include <kvm/arm_arch_timer.h>
@@ -202,9 +201,6 @@ struct kvm_vcpu_arch { 
	 /* Don't run the guest (internal implementation need) */

	bool pause;



	/* IO related fields */

	struct kvm_decode mmio_decode;



	/* Cache some mmu pages needed inside spinlock regions */

	struct kvm_mmu_memory_cache mmu_page_cache;
@@ -284,8 +280,6 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); 
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);

int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);



struct kvm_vcpu *kvm_arm_get_running_vcpu(void);

struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);

void kvm_arm_halt_guest(struct kvm *kvm);

void kvm_arm_resume_guest(struct kvm *kvm);
@@ -300,6 +294,14 @@ int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, 
static inline void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,

				     int exception_index) {}



/* MMIO helpers */

void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data);

unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len);



int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run);

int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,

		 phys_addr_t fault_ipa);



static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,

				       unsigned long hyp_stack_ptr,

				       unsigned long vector_ptr)
@@ -363,9 +365,9 @@ struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr); 
static inline bool kvm_arch_requires_vhe(void) { return false; }

static inline void kvm_arch_hardware_unsetup(void) {}

static inline void kvm_arch_sync_events(struct kvm *kvm) {}

static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}

static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}

static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}

static inline void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu) {}



static inline void kvm_arm_init_debug(void) {}

static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}

arch/arm/include/asm/kvm_hyp.h

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/compiler.h>

#include <linux/kvm_host.h>

#include <asm/cp15.h>

#include <asm/kvm_arm.h>

#include <asm/vfp.h>



#define __hyp_text __section(.hyp.text) notrace

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