Merge tag 'spi-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Renesas MSIOF spi controller

Required properties:

- compatible           : "renesas,msiof-r8a7790" (R-Car H2)

- compatible           : "renesas,msiof-r8a7743" (RZ/G1M)

			 "renesas,msiof-r8a7745" (RZ/G1E)

			 "renesas,msiof-r8a7790" (R-Car H2)

			 "renesas,msiof-r8a7791" (R-Car M2-W)

			 "renesas,msiof-r8a7792" (R-Car V2H)

			 "renesas,msiof-r8a7793" (R-Car M2-N)

			 "renesas,msiof-r8a7796" (R-Car M3-W)

			 "renesas,msiof-sh73a0" (SH-Mobile AG5)

			 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)

			 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)

			 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)

			 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)

			 "renesas,sh-msiof"      (deprecated)

	based on a specific SoC configuration.

- interrupts: interrupt number mapped to CPU.

- clocks: spi clk phandle

          For 66AK2G this property should be set per binding,

          Documentation/devicetree/bindings/clock/ti,sci-clk.txt

SoC-specific Required Properties:

The following are mandatory properties for Keystone 2 66AK2G SoCs only:

- power-domains:	Should contain a phandle to a PM domain provider node

			and an args specifier containing the SPI device id

			value. This property is as per the binding,

Optional:

- cs-gpios: gpio chip selects

		     "renesas,rspi-<soctype>", "renesas,rspi" as fallback.

		     For Renesas Serial Peripheral Interface on RZ/A1H:

		     "renesas,rspi-<soctype>", "renesas,rspi-rz" as fallback.

		     For Quad Serial Peripheral Interface on R-Car Gen2:

		     For Quad Serial Peripheral Interface on R-Car Gen2 and

		     RZ/G1 devices:

		     "renesas,qspi-<soctype>", "renesas,qspi" as fallback.

		     Examples with soctypes are:

		        - "renesas,rspi-sh7757" (SH)

			- "renesas,rspi-r7s72100" (RZ/A1H)

			- "renesas,qspi-r8a7743" (RZ/G1M)

			- "renesas,qspi-r8a7745" (RZ/G1E)

			- "renesas,qspi-r8a7790" (R-Car H2)

			- "renesas,qspi-r8a7791" (R-Car M2-W)

			- "renesas,qspi-r8a7792" (R-Car V2H)

Spreadtrum ADI controller

ADI is the abbreviation of Anolog-Digital interface, which is used to access

analog chip (such as PMIC) from digital chip. ADI controller follows the SPI

framework for its hardware implementation is alike to SPI bus and its timing

is compatile to SPI timing.

ADI controller has 50 channels including 2 software read/write channels and

48 hardware channels to access analog chip. For 2 software read/write channels,

users should set ADI registers to access analog chip. For hardware channels,

we can configure them to allow other hardware components to use it independently,

which means we can just link one analog chip address to one hardware channel,

then users can access the mapped analog chip address by this hardware channel

triggered by hardware components instead of ADI software channels.

Thus we introduce one property named "sprd,hw-channels" to configure hardware

channels, the first value specifies the hardware channel id which is used to

transfer data triggered by hardware automatically, and the second value specifies

the analog chip address where user want to access by hardware components.

Since we have multi-subsystems will use unique ADI to access analog chip, when

one system is reading/writing data by ADI software channels, that should be under

one hardware spinlock protection to prevent other systems from reading/writing

data by ADI software channels at the same time, or two parallel routine of setting

ADI registers will make ADI controller registers chaos to lead incorrect results.

Then we need one hardware spinlock to synchronize between the multiple subsystems.

Required properties:

- compatible: Should be "sprd,sc9860-adi".

- reg: Offset and length of ADI-SPI controller register space.

- hwlocks: Reference to a phandle of a hwlock provider node.

- hwlock-names: Reference to hwlock name strings defined in the same order

	as the hwlocks, should be "adi".

- #address-cells: Number of cells required to define a chip select address

	on the ADI-SPI bus. Should be set to 1.

- #size-cells: Size of cells required to define a chip select address size

	on the ADI-SPI bus. Should be set to 0.

Optional properties:

- sprd,hw-channels: This is an array of channel values up to 49 channels.

	The first value specifies the hardware channel id which is used to

	transfer data triggered by hardware automatically, and the second

	value specifies the analog chip address where user want to access

	by hardware components.

SPI slave nodes must be children of the SPI controller node and can contain

properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.

Example:

	adi_bus: spi@40030000 {

		compatible = "sprd,sc9860-adi";

		reg = <0 0x40030000 0 0x10000>;

		hwlocks = <&hwlock1 0>;

		hwlock-names = "adi";

		#address-cells = <1>;

		#size-cells = <0>;

		sprd,hw-channels = <30 0x8c20>;

	};

#

# SPI driver configuration

#

# NOTE:  the reason this doesn't show SPI slave support is mostly that

# nobody's needed a slave side API yet.  The master-role API is not

# fully appropriate there, so it'd need some thought to do well.

#

menuconfig SPI

	bool "SPI support"

	depends on HAS_IOMEM

	tristate "Freescale DSPI controller"

	select REGMAP_MMIO

	depends on HAS_DMA

	depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST

	depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST

	help

	  This enables support for the Freescale DSPI controller in master

	  mode. VF610 platform uses the controller.

	help

	  SPI driver for CSR SiRFprimaII SoCs

config SPI_SPRD_ADI

	tristate "Spreadtrum ADI controller"

	depends on ARCH_SPRD || COMPILE_TEST

	depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK)

	help

	  ADI driver based on SPI for Spreadtrum SoCs.

config SPI_STM32

	tristate "STMicroelectronics STM32 SPI controller"

	depends on ARCH_STM32 || COMPILE_TEST