Commit e75279e8 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu/sdma4: Add raven2 golden setting 



Golden register settings from the hw team.

Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e7497a30

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+16 −5
Original line number Diff line number Diff line
@@ -185,6 +185,12 @@ static const struct soc15_reg_golden golden_settings_sdma_rv1[] = 
	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GB_ADDR_CONFIG_READ, 0x0018773f, 0x00000002)

};



static const struct soc15_reg_golden golden_settings_sdma_rv2[] =

{

	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GB_ADDR_CONFIG, 0x0018773f, 0x00003001),

	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GB_ADDR_CONFIG_READ, 0x0018773f, 0x00003001)

};



static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev,

		u32 instance, u32 offset)

{
@@ -227,6 +233,11 @@ static void sdma_v4_0_init_golden_registers(struct amdgpu_device *adev) 
		soc15_program_register_sequence(adev,

						golden_settings_sdma_4_1,

						ARRAY_SIZE(golden_settings_sdma_4_1));

		if (adev->rev_id >= 8)

			soc15_program_register_sequence(adev,

							golden_settings_sdma_rv2,

							ARRAY_SIZE(golden_settings_sdma_rv2));

		else

			soc15_program_register_sequence(adev,

							golden_settings_sdma_rv1,

							ARRAY_SIZE(golden_settings_sdma_rv1));

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