Commit e74db5a5 authored by Nagarjuna Kristam's avatar Nagarjuna Kristam Committed by Thierry Reding
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arm64: tegra: Add XUDC node for Tegra210



Tegra210 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.

Signed-off-by: default avatarNagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 6895c83f
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+19 −0
Original line number Diff line number Diff line
@@ -1207,6 +1207,25 @@
		status = "disabled";
	};

	usb@700d0000 {
		compatible = "nvidia,tegra210-xudc";
		reg = <0x0 0x700d0000 0x0 0x8000>,
		      <0x0 0x700d8000 0x0 0x1000>,
		      <0x0 0x700d9000 0x0 0x1000>;
		reg-names = "base", "fpci", "ipfs";
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
			 <&tegra_car TEGRA210_CLK_XUSB_SS>,
			 <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
			 <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
			 <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
		clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
		power-domains = <&pd_xusbdev>, <&pd_xusbss>;
		power-domain-names = "dev", "ss";
		nvidia,xusb-padctl = <&padctl>;
		status = "disabled";
	};

	mipi: mipi@700e3000 {
		compatible = "nvidia,tegra210-mipi";
		reg = <0x0 0x700e3000 0x0 0x100>;