Commit e6c7c9d0 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'mediatek-drm-next-5.11-2' of... 

Merge tag 'mediatek-drm-next-5.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux

 into drm-next

Mediatek DRM Next for Linux 5.11-2

1. Add MT8167 support
2. Cleanup function
3. Convert the dpi bindings to yaml
4. Drop local dma_parms
5. Fix formatting and provide missing member description
6. Introduce GEM object functions
7. Fix aliases name
8. Move MIPI DSI phy driver to phy folder

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130234807.936-1-chunkuang.hu@kernel.org
parents 207665fd a4423bec

Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt

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@@ -43,7 +43,7 @@ Required properties (all function blocks): 
	"mediatek,<chip>-dpi"        		- DPI controller, see mediatek,dpi.txt

	"mediatek,<chip>-disp-mutex" 		- display mutex

	"mediatek,<chip>-disp-od"    		- overdrive

  the supported chips are mt2701, mt7623, mt2712 and mt8173.

  the supported chips are mt2701, mt7623, mt2712, mt8167 and mt8173.

- reg: Physical base address and length of the function block register space

- interrupts: The interrupt signal from the function block (required, except for

  merge and split function blocks).
@@ -59,7 +59,7 @@ Required properties (DMA function blocks): 
	"mediatek,<chip>-disp-ovl"

	"mediatek,<chip>-disp-rdma"

	"mediatek,<chip>-disp-wdma"

  the supported chips are mt2701 and mt8173.

  the supported chips are mt2701, mt8167 and mt8173.

- larb: Should contain a phandle pointing to the local arbiter device as defined

  in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt

- iommus: Should point to the respective IOMMU block with master port as

Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt

deleted100644 → 0
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Mediatek DPI Device

===================



The Mediatek DPI function block is a sink of the display subsystem and

provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel

output bus.



Required properties:

- compatible: "mediatek,<chip>-dpi"

  the supported chips are mt2701, mt7623, mt8173 and mt8183.

- reg: Physical base address and length of the controller's registers

- interrupts: The interrupt signal from the function block.

- clocks: device clocks

  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.

- clock-names: must contain "pixel", "engine", and "pll"

- port: Output port node with endpoint definitions as described in

  Documentation/devicetree/bindings/graph.txt. This port should be connected

  to the input port of an attached HDMI or LVDS encoder chip.



Optional properties:

- pinctrl-names: Contain "default" and "sleep".



Example:



dpi0: dpi@1401d000 {

	compatible = "mediatek,mt8173-dpi";

	reg = <0 0x1401d000 0 0x1000>;

	interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;

	clocks = <&mmsys CLK_MM_DPI_PIXEL>,

		 <&mmsys CLK_MM_DPI_ENGINE>,

		 <&apmixedsys CLK_APMIXED_TVDPLL>;

	clock-names = "pixel", "engine", "pll";

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&dpi_pin_func>;

	pinctrl-1 = <&dpi_pin_idle>;



	port {

		dpi0_out: endpoint {

			remote-endpoint = <&hdmi0_in>;

		};

	};

};

Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: mediatek DPI Controller Device Tree Bindings



maintainers:

  - CK Hu <ck.hu@mediatek.com>

  - Jitao shi <jitao.shi@mediatek.com>



description: |

  The Mediatek DPI function block is a sink of the display subsystem and

  provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel

  output bus.



properties:

  compatible:

    enum:

      - mediatek,mt2701-dpi

      - mediatek,mt7623-dpi

      - mediatek,mt8173-dpi

      - mediatek,mt8183-dpi



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: Pixel Clock

      - description: Engine Clock

      - description: DPI PLL



  clock-names:

    items:

      - const: pixel

      - const: engine

      - const: pll



  pinctrl-0: true

  pinctrl-1: true



  pinctrl-names:

    items:

      - const: default

      - const: sleep



  port:

    type: object

    description:

      Output port node with endpoint definitions as described in

      Documentation/devicetree/bindings/graph.txt. This port should be connected

      to the input port of an attached HDMI or LVDS encoder chip.



    properties:

      endpoint:

        type: object



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - port



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/mt8173-clk.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    dpi0: dpi@1401d000 {

        compatible = "mediatek,mt8173-dpi";

        reg = <0x1401d000 0x1000>;

        interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;

        clocks = <&mmsys CLK_MM_DPI_PIXEL>,

             <&mmsys CLK_MM_DPI_ENGINE>,

             <&apmixedsys CLK_APMIXED_TVDPLL>;

        clock-names = "pixel", "engine", "pll";

        pinctrl-names = "default", "sleep";

        pinctrl-0 = <&dpi_pin_func>;

        pinctrl-1 = <&dpi_pin_idle>;



        port {

            dpi0_out: endpoint {

                remote-endpoint = <&hdmi0_in>;

            };

        };

    };



...

MAINTAINERS

+1 −0
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@@ -5870,6 +5870,7 @@ S: Supported 
F:	Documentation/devicetree/bindings/display/mediatek/

F:	drivers/gpu/drm/mediatek/

F:	drivers/phy/mediatek/phy-mtk-hdmi*

F:	drivers/phy/mediatek/phy-mtk-mipi*















DRM DRIVERS FOR NVIDIA TEGRA















M:	Thierry Reding <thierry.reding@gmail.com>

































drivers/gpu/drm/mediatek/Kconfig



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@@ -13,6 +13,7 @@ config DRM_MEDIATEK













	select DRM_PANEL















	select MEMORY















	select MTK_SMI













	select PHY_MTK_MIPI_DSI















	select VIDEOMODE_HELPERS















	help















	  Choose this option if you have a Mediatek SoCs.









































































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