Commit e6b63a7b authored by Fritz Koenig's avatar Fritz Koenig Committed by Sean Paul
Browse files

drm/msm/dpu: Use simple list for plane format init 



Simplify the initilization of a list of formats
by passing the list in directly instead of copying
it from one structure to another.

Signed-off-by: default avatarFritz Koenig <frkoenig@google.com>
Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
parent 6de75d55

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c

+0 −33
Original line number Diff line number Diff line
@@ -1137,36 +1137,3 @@ const struct msm_format *dpu_get_msm_format( 
		return &fmt->base;

	return NULL;

}
 


uint32_t dpu_populate_formats(

		const struct dpu_format_extended *format_list,

		uint32_t *pixel_formats,

		uint64_t *pixel_modifiers,

		uint32_t pixel_formats_max)

{

	uint32_t i, fourcc_format;



	if (!format_list || !pixel_formats)

		return 0;



	for (i = 0, fourcc_format = 0;

			format_list->fourcc_format && i < pixel_formats_max;

			++format_list) {

		/* verify if listed format is in dpu_format_map? */



		/* optionally return modified formats */

		if (pixel_modifiers) {

			/* assume same modifier for all fb planes */

			pixel_formats[i] = format_list->fourcc_format;

			pixel_modifiers[i++] = format_list->modifier;

		} else {

			/* assume base formats grouped together */

			if (fourcc_format != format_list->fourcc_format) {

				fourcc_format = format_list->fourcc_format;

				pixel_formats[i++] = fourcc_format;

			}

		}

	}



	return i;

}

drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h

+0 −14
Original line number Diff line number Diff line
@@ -40,20 +40,6 @@ const struct msm_format *dpu_get_msm_format( 
		const uint32_t format,

		const uint64_t modifiers);



/**

 * dpu_populate_formats - populate the given array with fourcc codes supported

 * @format_list:       pointer to list of possible formats

 * @pixel_formats:     array to populate with fourcc codes

 * @pixel_modifiers:   array to populate with drm modifiers, can be NULL

 * @pixel_formats_max: length of pixel formats array

 * Return: number of elements populated

 */

uint32_t dpu_populate_formats(

		const struct dpu_format_extended *format_list,

		uint32_t *pixel_formats,

		uint64_t *pixel_modifiers,

		uint32_t pixel_formats_max);



/**

 * dpu_format_check_modified_format - validate format and buffers for

 *                   dpu non-standard, i.e. modified format

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

+4 −0
Original line number Diff line number Diff line
@@ -151,7 +151,9 @@ static const struct dpu_sspp_blks_common sdm845_sspp_common = { 
		.id = DPU_SSPP_CSC_10BIT, \

		.base = 0x1a00, .len = 0x100,}, \

	.format_list = plane_formats_yuv, \

	.num_formats = ARRAY_SIZE(plane_formats_yuv), \

	.virt_format_list = plane_formats, \

	.virt_num_formats = ARRAY_SIZE(plane_formats), \

	}



#define _DMA_SBLK(num, sdma_pri) \
@@ -163,7 +165,9 @@ static const struct dpu_sspp_blks_common sdm845_sspp_common = { 
	.src_blk = {.name = STRCAT("sspp_src_", num), \

		.id = DPU_SSPP_SRC, .base = 0x00, .len = 0x150,}, \

	.format_list = plane_formats, \

	.num_formats = ARRAY_SIZE(plane_formats), \

	.virt_format_list = plane_formats, \

	.virt_num_formats = ARRAY_SIZE(plane_formats), \

	}



static const struct dpu_sspp_sub_blks sdm845_vig_sblk_0 = _VIG_SBLK("0", 5);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+6 −13
Original line number Diff line number Diff line
@@ -251,17 +251,6 @@ struct dpu_pp_blk { 
	u32 version;

};



/**

 * struct dpu_format_extended - define dpu specific pixel format+modifier

 * @fourcc_format: Base FOURCC pixel format code

 * @modifier: 64-bit drm format modifier, same modifier must be applied to all

 *            framebuffer planes

 */

struct dpu_format_extended {

	uint32_t fourcc_format;

	uint64_t modifier;

};



/**

 * enum dpu_qos_lut_usage - define QoS LUT use cases

 */
@@ -348,7 +337,9 @@ struct dpu_sspp_blks_common { 
 * @pcc_blk:

 * @igc_blk:

 * @format_list: Pointer to list of supported formats

 * @num_formats: Number of supported formats

 * @virt_format_list: Pointer to list of supported formats for virtual planes

 * @virt_num_formats: Number of supported formats for virtual planes

 */

struct dpu_sspp_sub_blks {

	const struct dpu_sspp_blks_common *common;
@@ -366,8 +357,10 @@ struct dpu_sspp_sub_blks { 
	struct dpu_pp_blk pcc_blk;

	struct dpu_pp_blk igc_blk;



	const struct dpu_format_extended *format_list;

	const struct dpu_format_extended *virt_format_list;

	const u32 *format_list;

	u32 num_formats;

	const u32 *virt_format_list;

	u32 virt_num_formats;

};



/**

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog_format.h

+74 −77
Original line number Diff line number Diff line
@@ -12,84 +12,81 @@ 


#include "dpu_hw_mdss.h"



static const struct dpu_format_extended plane_formats[] = {

	{DRM_FORMAT_ARGB8888, 0},

	{DRM_FORMAT_ABGR8888, 0},

	{DRM_FORMAT_RGBA8888, 0},

	{DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_BGRA8888, 0},

	{DRM_FORMAT_XRGB8888, 0},

	{DRM_FORMAT_RGBX8888, 0},

	{DRM_FORMAT_BGRX8888, 0},

	{DRM_FORMAT_XBGR8888, 0},

	{DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_RGB888, 0},

	{DRM_FORMAT_BGR888, 0},

	{DRM_FORMAT_RGB565, 0},

	{DRM_FORMAT_BGR565, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_BGR565, 0},

	{DRM_FORMAT_ARGB1555, 0},

	{DRM_FORMAT_ABGR1555, 0},

	{DRM_FORMAT_RGBA5551, 0},

	{DRM_FORMAT_BGRA5551, 0},

	{DRM_FORMAT_XRGB1555, 0},

	{DRM_FORMAT_XBGR1555, 0},

	{DRM_FORMAT_RGBX5551, 0},

	{DRM_FORMAT_BGRX5551, 0},

	{DRM_FORMAT_ARGB4444, 0},

	{DRM_FORMAT_ABGR4444, 0},

	{DRM_FORMAT_RGBA4444, 0},

	{DRM_FORMAT_BGRA4444, 0},

	{DRM_FORMAT_XRGB4444, 0},

	{DRM_FORMAT_XBGR4444, 0},

	{DRM_FORMAT_RGBX4444, 0},

	{DRM_FORMAT_BGRX4444, 0},

	{0, 0},

static const uint32_t qcom_compressed_supported_formats[] = {

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_BGR565,

};



static const struct dpu_format_extended plane_formats_yuv[] = {

	{DRM_FORMAT_ARGB8888, 0},

	{DRM_FORMAT_ABGR8888, 0},

	{DRM_FORMAT_RGBA8888, 0},

	{DRM_FORMAT_BGRX8888, 0},

	{DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_BGRA8888, 0},

	{DRM_FORMAT_XRGB8888, 0},

	{DRM_FORMAT_XBGR8888, 0},

	{DRM_FORMAT_RGBX8888, 0},

	{DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_RGB888, 0},

	{DRM_FORMAT_BGR888, 0},

	{DRM_FORMAT_RGB565, 0},

	{DRM_FORMAT_BGR565, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_BGR565, 0},

	{DRM_FORMAT_ARGB1555, 0},

	{DRM_FORMAT_ABGR1555, 0},

	{DRM_FORMAT_RGBA5551, 0},

	{DRM_FORMAT_BGRA5551, 0},

	{DRM_FORMAT_XRGB1555, 0},

	{DRM_FORMAT_XBGR1555, 0},

	{DRM_FORMAT_RGBX5551, 0},

	{DRM_FORMAT_BGRX5551, 0},

	{DRM_FORMAT_ARGB4444, 0},

	{DRM_FORMAT_ABGR4444, 0},

	{DRM_FORMAT_RGBA4444, 0},

	{DRM_FORMAT_BGRA4444, 0},

	{DRM_FORMAT_XRGB4444, 0},

	{DRM_FORMAT_XBGR4444, 0},

	{DRM_FORMAT_RGBX4444, 0},

	{DRM_FORMAT_BGRX4444, 0},

static const uint32_t plane_formats[] = {

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_RGBX8888,

	DRM_FORMAT_BGRX8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_RGB888,

	DRM_FORMAT_BGR888,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_RGBA4444,

	DRM_FORMAT_BGRA4444,

	DRM_FORMAT_XRGB4444,

	DRM_FORMAT_XBGR4444,

	DRM_FORMAT_RGBX4444,

	DRM_FORMAT_BGRX4444,

};



static const uint32_t plane_formats_yuv[] = {

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_RGBA8888,

	DRM_FORMAT_BGRX8888,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_RGBX8888,

	DRM_FORMAT_RGB888,

	DRM_FORMAT_BGR888,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_BGR565,

	DRM_FORMAT_ARGB1555,

	DRM_FORMAT_ABGR1555,

	DRM_FORMAT_RGBA5551,

	DRM_FORMAT_BGRA5551,

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_XBGR1555,

	DRM_FORMAT_RGBX5551,

	DRM_FORMAT_BGRX5551,

	DRM_FORMAT_ARGB4444,

	DRM_FORMAT_ABGR4444,

	DRM_FORMAT_RGBA4444,

	DRM_FORMAT_BGRA4444,

	DRM_FORMAT_XRGB4444,

	DRM_FORMAT_XBGR4444,

	DRM_FORMAT_RGBX4444,

	DRM_FORMAT_BGRX4444,



	{DRM_FORMAT_NV12, 0},

	{DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_COMPRESSED},

	{DRM_FORMAT_NV21, 0},

	{DRM_FORMAT_NV16, 0},

	{DRM_FORMAT_NV61, 0},

	{DRM_FORMAT_VYUY, 0},

	{DRM_FORMAT_UYVY, 0},

	{DRM_FORMAT_YUYV, 0},

	{DRM_FORMAT_YVYU, 0},

	{DRM_FORMAT_YUV420, 0},

	{DRM_FORMAT_YVU420, 0},

	{0, 0},

	DRM_FORMAT_NV12,

	DRM_FORMAT_NV21,

	DRM_FORMAT_NV16,

	DRM_FORMAT_NV61,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_YUV420,

	DRM_FORMAT_YVU420,

};

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