Commit e6747e24 authored by Douglas Anderson's avatar Douglas Anderson Committed by Stephen Boyd
Browse files

dt-bindings: clock: Fix qcom,gpucc bindings for sdm845/sc7180/msm8998 



The qcom,gpucc bindings had a few problems with them:

1. When things were converted to yaml the name of the "gpll0 main"
   clock got changed from "gpll0" to "gpll0_main".  Change it back for
   msm8998.

2. Apparently there is a push not to use purist aliases for clocks but
   instead to just use the internal Qualcomm names.  For sdm845 and
   sc7180 (where the drivers haven't already been changed) move in
   this direction.

Things were also getting complicated harder to deal with by jamming
several SoCs into one file.  Splitting simplifies things.

Fixes: 5c6f3a36 ("dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings")
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Link: https://lkml.kernel.org/r/20200203103049.v4.7.I513cd73b16665065ae6c22cf594d8b543745e28c@changeid


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 3696ebe4

Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Graphics Clock & Reset Controller Binding for MSM8998



maintainers:

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm graphics clock control module which supports the clocks, resets and

  power domains on MSM8998.



  See also dt-bindings/clock/qcom,gpucc-msm8998.h.



properties:

  compatible:

    const: qcom,msm8998-gpucc



  clocks:

    items:

      - description: Board XO source

      - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)



  clock-names:

    items:

      - const: xo

      - const: gpll0



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-msm8998.h>

    #include <dt-bindings/clock/qcom,rpmcc.h>

    clock-controller@5065000 {

      compatible = "qcom,msm8998-gpucc";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

      reg = <0x05065000 0x9000>;

      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0_OUT_MAIN>;

      clock-names = "xo", "gpll0";

    };

...

Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml

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# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,sc7180-gpucc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Graphics Clock & Reset Controller Binding for SC7180



maintainers:

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm graphics clock control module which supports the clocks, resets and

  power domains on SC7180.



  See also dt-bindings/clock/qcom,gpucc-sc7180.h.



properties:

  compatible:

    const: qcom,sc7180-gpucc



  clocks:

    items:

      - description: Board XO source

      - description: GPLL0 main branch source

      - description: GPLL0 div branch source



  clock-names:

    items:

      - const: bi_tcxo

      - const: gcc_gpu_gpll0_clk_src

      - const: gcc_gpu_gpll0_div_clk_src



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'

  - '#reset-cells'

  - '#power-domain-cells'



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-sc7180.h>

    #include <dt-bindings/clock/qcom,rpmh.h>

    clock-controller@5090000 {

      compatible = "qcom,sc7180-gpucc";

      reg = <0 0x05090000 0 0x9000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>,

               <&gcc GCC_GPU_GPLL0_CLK_SRC>,

               <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;

      clock-names = "bi_tcxo",

                    "gcc_gpu_gpll0_clk_src",

                    "gcc_gpu_gpll0_div_clk_src";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,gpucc.yaml→Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml

+72 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only

%YAML 1.2

---

$id: http://devicetree.org/schemas/bindings/clock/qcom,gpucc.yaml#

$id: http://devicetree.org/schemas/clock/qcom,sdm845-gpucc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Graphics Clock & Reset Controller Binding

title: Qualcomm Graphics Clock & Reset Controller Binding for SDM845



maintainers:

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm grpahics clock control module which supports the clocks, resets and

  power domains.

  Qualcomm graphics clock control module which supports the clocks, resets and

  power domains on SDM845.



  See also dt-bindings/clock/qcom,gpucc-sdm845.h.



properties:

  compatible:

    enum:

      - qcom,msm8998-gpucc

      - qcom,sc7180-gpucc

      - qcom,sdm845-gpucc

    const: qcom,sdm845-gpucc



  clocks:

    minItems: 1

    maxItems: 3

    items:

      - description: Board XO source

      - description: GPLL0 main branch source from GCC(gcc_gpu_gpll0_clk_src)

      - description: GPLL0 div branch source from GCC(gcc_gpu_gpll0_div_clk_src)

      - description: GPLL0 main branch source

      - description: GPLL0 div branch source



  clock-names:

    minItems: 1

    maxItems: 3

    items:

      - const: xo

      - const: gpll0_main

      - const: gpll0_div

      - const: bi_tcxo

      - const: gcc_gpu_gpll0_clk_src

      - const: gcc_gpu_gpll0_div_clk_src



  '#clock-cells':

    const: 1
@@ -58,13 +53,18 @@ required: 
  - '#power-domain-cells'



examples:

  # Example of GPUCC with clock node properties for SDM845:

  - |

    #include <dt-bindings/clock/qcom,gcc-sdm845.h>

    #include <dt-bindings/clock/qcom,rpmh.h>

    clock-controller@5090000 {

      compatible = "qcom,sdm845-gpucc";

      reg = <0x5090000 0x9000>;

      clocks = <&rpmhcc 0>, <&gcc 31>, <&gcc 32>;

      clock-names = "xo", "gpll0_main", "gpll0_div";

      reg = <0 0x05090000 0 0x9000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>,

               <&gcc GCC_GPU_GPLL0_CLK_SRC>,

               <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;

      clock-names = "bi_tcxo",

                    "gcc_gpu_gpll0_clk_src",

                    "gcc_gpu_gpll0_div_clk_src";

      #clock-cells = <1>;

      #reset-cells = <1>;

      #power-domain-cells = <1>;

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