Commit e65650e6 authored by Kokoris, Ioannis's avatar Kokoris, Ioannis Committed by Kumar Gala
Browse files

powerpc/qe: set IReady in QE Microcode Upload 



QE Microcode Initialization using qe_upload_microcode() does not work on
P1021 if the IRAM-Ready register is not set after the microcode upload. Add
a definition for the "I-RAM Ready" register and sets it upon microcode
upload completion.

Signed-off-by: default avatarIoannis Kokkoris <ioannis.kokoris@siemens-enterprise.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 1f0e90ad

arch/powerpc/include/asm/immap_qe.h

+3 −1
Original line number Diff line number Diff line
@@ -26,7 +26,9 @@ 
struct qe_iram {

	__be32	iadd;		/* I-RAM Address Register */

	__be32	idata;		/* I-RAM Data Register */

	u8	res0[0x78];

	u8	res0[0x04];

	__be32	iready;		/* I-RAM Ready Register */

	u8	res1[0x70];

} __attribute__ ((packed));



/* QE Interrupt Controller */

arch/powerpc/include/asm/qe.h

+1 −0
Original line number Diff line number Diff line
@@ -499,6 +499,7 @@ enum comm_dir { 
/* I-RAM */

#define QE_IRAM_IADD_AIE	0x80000000	/* Auto Increment Enable */

#define QE_IRAM_IADD_BADDR	0x00080000	/* Base Address */

#define QE_IRAM_READY           0x80000000      /* Ready */



/* UPC */

#define UPGCR_PROTOCOL	0x80000000	/* protocol ul2 or pl2 */

arch/powerpc/sysdev/qe_lib/qe.c

+3 −0
Original line number Diff line number Diff line
@@ -395,6 +395,9 @@ static void qe_upload_microcode(const void *base, 


	for (i = 0; i < be32_to_cpu(ucode->count); i++)

		out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));

	

	/* Set I-RAM Ready Register */

	out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));

}



/*

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