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In commit f477b7fb ("spi: DUAL and QUAD support"), spi_device.mode was enlarged from 8 to 16 bits. However, the spidev code still only saved 8 bits of data. If a spidev SPI_IOC_WR_MODE or SPI_IOC_WR_LSB_FIRST request failed, only the lower 8 bits of the SPI mode were restored, inadvertently clearing the upper 8 bits, possibly disabling Quad or Dual SPI transfers for the device. Save up to 32 bits to fix this. For SPI_IOC_WR_MODE this is probably not so important, as it doesn't allow setting Quad or Dual mode anyway, but SPI_IOC_WR_LSB_FIRST is used to just set or clear a single bit. Signed-off-by:Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by:
Mark Brown <broonie@linaro.org>
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