Commit e5f31378 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Ulf Hansson
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dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller 



This documents the devicetree bindings for the SDHC MMC host controller
found in Meson6, Meson8, Meson8b and Meson8m2 SoCs. It can use a
bus-width of 1/4/8-bit and it supports eMMC spec 4.4x/4.5x including
HS200 mode (up to 100MHz clock). It embeds an internal clock controller
which outputs four clocks (mod_clk, sd_clk, tx_clk and rx_clk) and is
fed by four external input clocks (clkin[0-3]). "pclk" is the module
register clock, it has to be enabled to access the registers.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200512204147.504087-2-martin.blumenstingl@googlemail.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 83fc5dd5

Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Meson SDHC controller Device Tree Bindings



allOf:

  - $ref: "mmc-controller.yaml"



maintainers:

  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>



description: |

  The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC

  card interface with 1/4/8-bit bus width.

  It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).



properties:

  compatible:

    items:

      - enum:

        - amlogic,meson8-sdhc

        - amlogic,meson8b-sdhc

        - amlogic,meson8m2-sdhc

      - const: amlogic,meson-mx-sdhc



  reg:

    minItems: 1



  interrupts:

    minItems: 1



  clocks:

    minItems: 5



  clock-names:

    items:

      - const: clkin0

      - const: clkin1

      - const: clkin2

      - const: clkin3

      - const: pclk



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    sdhc: mmc@8e00 {

      compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";

      reg = <0x8e00 0x42>;

      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>;

      clocks = <&xtal>,

               <&fclk_div4>,

               <&fclk_div3>,

               <&fclk_div5>,

               <&sdhc_pclk>;

      clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";

    };

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