Commit e5aefb38 authored by Masahiro Yamada's avatar Masahiro Yamada
Browse files

arm64: dts: uniphier: add Denali NAND controller nodes 



Add NAND controller node to LD11 and LD20.  Neither of them supports
the CS1 line, so pinctrl is set up for a single CS line.

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 6b8b062e

arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts

+4 −0
Original line number Diff line number Diff line
@@ -68,3 +68,7 @@ 
&usb2 {

	status = "okay";

};



&nand {

	status = "okay";

};

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -372,6 +372,17 @@ 
				compatible = "socionext,uniphier-wdt";

			};

		};



		nand: nand@68000000 {

			compatible = "socionext,uniphier-denali-nand-v5b";

			status = "disabled";

			reg-names = "nand_data", "denali_reg";

			reg = <0x68000000 0x20>, <0x68100000 0x1000>;

			interrupts = <0 65 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_nand>;

			clocks = <&sys_clk 2>;

		};

	};

};

arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts

+4 −0
Original line number Diff line number Diff line
@@ -50,3 +50,7 @@ 
&i2c0 {

	status = "okay";

};



&nand {

	status = "okay";

};

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -393,6 +393,17 @@ 
				compatible = "socionext,uniphier-wdt";

			};

		};



		nand: nand@68000000 {

			compatible = "socionext,uniphier-denali-nand-v5b";

			status = "disabled";

			reg-names = "nand_data", "denali_reg";

			reg = <0x68000000 0x20>, <0x68100000 0x1000>;

			interrupts = <0 65 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_nand>;

			clocks = <&sys_clk 2>;

		};

	};

};

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