Commit e5a80520 authored by Biju Das's avatar Biju Das Committed by Daniel Lezcano
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dt-bindings: timer: renesas, cmt: Document r8a774a1 CMT support



Document SoC specific bindings for RZ/G2M (r8a774a1) SoC.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 3825603a
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+8 −3
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ Required Properties:
    - "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745.
    - "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470.
    - "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470.
    - "renesas,r8a774a1-cmt0" for the 32-bit CMT0 device included in r8a774a1.
    - "renesas,r8a774a1-cmt1" for the 48-bit CMT1 device included in r8a774a1.
    - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
    - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
    - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
@@ -51,9 +53,12 @@ Required Properties:
		and RZ/G1.
		These are fallbacks for r8a73a4, R-Car Gen2 and RZ/G1 entries
		listed above.
    - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3.
    - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3.
		These are fallbacks for R-Car Gen3 entries listed above.
    - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3
		and RZ/G2.
    - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3
		and RZ/G2.
		These are fallbacks for R-Car Gen3 and RZ/G2 entries listed
		above.

  - reg: base address and length of the registers block for the timer module.
  - interrupts: interrupt-specifier for the timer, one per channel.