Commit e5264212 authored by Sasha Neftin's avatar Sasha Neftin Committed by Jeff Kirsher
Browse files

igc: Remove unused registers



Tx data FIFO Head/Tail, Saved and Packet Count registers
not applicable for i225 LAN controller.
This patch comes to clean up these registers.

Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 551555a7
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+0 −4
Original line number Diff line number Diff line
@@ -35,10 +35,6 @@ static const struct igc_reg_info igc_reg_info_tbl[] = {
	{IGC_TDH(0), "TDH"},
	{IGC_TDT(0), "TDT"},
	{IGC_TXDCTL(0), "TXDCTL"},
	{IGC_TDFH, "TDFH"},
	{IGC_TDFT, "TDFT"},
	{IGC_TDFHS, "TDFHS"},
	{IGC_TDFPC, "TDFPC"},

	/* List Terminator */
	{}
+0 −5
Original line number Diff line number Diff line
@@ -17,11 +17,6 @@
/* Internal Packet Buffer Size Registers */
#define IGC_RXPBS		0x02404  /* Rx Packet Buffer Size - RW */
#define IGC_TXPBS		0x03404  /* Tx Packet Buffer Size - RW */
#define IGC_TDFH		0x03410  /* Tx Data FIFO Head - RW */
#define IGC_TDFT		0x03418  /* Tx Data FIFO Tail - RW */
#define IGC_TDFHS		0x03420  /* Tx Data FIFO Head Saved - RW */
#define IGC_TDFTS		0x03428  /* Tx Data FIFO Tail Saved - RW */
#define IGC_TDFPC		0x03430  /* Tx Data FIFO Packet Count - RW */

/* NVM  Register Descriptions */
#define IGC_EERD		0x12014  /* EEprom mode read - RW */