Commit e5051b84 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc 

From Shawn Guo:

imx soc changes for 3.11:

* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
  as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates

* tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6

: (29 commits)
  ARM: imx_v6_v7_defconfig: Enable Vybrid VF610
  ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default
  ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
  ARM: imx_v6_v7_defconfig: Enable PWM and backlight options
  ARM: imx: Remove mxc specific ulpi access ops
  ARM: imx: add initial support for VF610
  ARM: imx: add VF610 clock support
  ARM: imx_v6_v7_defconfig: enable parallel display
  ARM: imx: clk: No need to initialize phandle struct
  ARM: imx: irq-common: Include header to avoid sparse warning
  ARM: imx: Enable mx6 solo-lite support
  ARM: imx6: use common of_clk_init() call to initialize clocks
  ARM: imx6q: call of_clk_init() to register fixed rate clocks
  ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE
  ARM: i.MX6: clk: add different DualLite MLB clock config
  ARM i.MX5: Add S/PDIF clocks
  ARM i.MX53: Add SATA clock
  ARM: imx6q: clk: add the eim_slow clock
  ARM: imx: remove MLB PLL from pllv3
  ARM: imx: disable pll8_mlb in mx6q_clks
  ...

Conflicts:
	arch/arm/Kconfig.debug (simple add/add conflict)

Includes an update to 3.10-rc6

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c3b693d1 3bfbc6cd

Documentation/bcache.txt

+9 −3
Original line number Diff line number Diff line
@@ -319,7 +319,10 @@ cache<0..n> 
  Symlink to each of the cache devices comprising this cache set. 



cache_available_percent

  Percentage of cache device free.

  Percentage of cache device which doesn't contain dirty data, and could

  potentially be used for writeback.  This doesn't mean this space isn't used

  for clean cached data; the unused statistic (in priority_stats) is typically

  much lower.



clear_stats

  Clears the statistics associated with this cache
@@ -423,8 +426,11 @@ nbuckets 
  Total buckets in this cache



priority_stats

  Statistics about how recently data in the cache has been accessed.  This can

  reveal your working set size.

  Statistics about how recently data in the cache has been accessed.

  This can reveal your working set size.  Unused is the percentage of

  the cache that doesn't contain any data.  Metadata is bcache's

  metadata overhead.  Average is the average priority of cache buckets.

  Next is a list of quantiles with the priority threshold of each.



written

  Sum of all data that has been written to the cache; comparison with

Documentation/devices.txt

+2 −6
Original line number Diff line number Diff line
@@ -498,12 +498,8 @@ Your cooperation is appreciated. 


		Each device type has 5 bits (32 minors).



 13 block	8-bit MFM/RLL/IDE controller

		  0 = /dev/xda		First XT disk whole disk

		 64 = /dev/xdb		Second XT disk whole disk



		Partitions are handled in the same way as IDE disks

		(see major number 3).

 13 block	Previously used for the XT disk (/dev/xdN)

		Deleted in kernel v3.9.



 14 char	Open Sound System (OSS)

		  0 = /dev/mixer	Mixer control

Documentation/devicetree/bindings/clock/imx5-clock.txt

+13 −0
Original line number Diff line number Diff line
@@ -184,6 +184,19 @@ clocks and IDs. 
	cko2			170

	srtc_gate		171

	pata_gate		172

	sata_gate		173

	spdif_xtal_sel		174

	spdif0_sel		175

	spdif1_sel		176

	spdif0_pred		177

	spdif0_podf		178

	spdif1_pred		179

	spdif1_podf		180

	spdif0_com_sel		181

	spdif1_com_sel		182

	spdif0_gate		183

	spdif1_gate		184

	spdif_ipg_gate		185



Examples (for mx53):

Documentation/devicetree/bindings/clock/imx6q-clock.txt

+1 −0
Original line number Diff line number Diff line
@@ -208,6 +208,7 @@ clocks and IDs. 
	pll4_post_div		193

	pll5_post_div		194

	pll5_video_div		195

	eim_slow      		196



Examples:

Documentation/devicetree/bindings/clock/imx6sl-clock.txt

0 → 100644
+10 −0
Original line number Diff line number Diff line 
* Clock bindings for Freescale i.MX6 SoloLite



Required properties:

- compatible: Should be "fsl,imx6sl-ccm"

- reg: Address and length of the register set

- #clock-cells: Should be <1>



The clock consumer should specify the desired clock by having the clock

ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6sl-clock.h

for the full list of i.MX6 SoloLite clock IDs.

CRA Git | Maintained and supported by SUSTech CRA and CCSE