arm64: dts: msm8916: remove bogus argument to the cpu clock (e4f045ef) · Commits · 戴 / test

The apcs node has #clock-cells = <0>, which means that those who references it should specify 0 arguments. The apcs reference in the cpu node incorrectly specifies an argument, remove this bogus argument. Fixes: ("arm64: dts: qcom: msm8916: Add CPU frequency scaling support") Signed-off-by:

Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by:

Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:

Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by:

Andy Gross <andy.gross@linaro.org>

arch/arm64/boot/dts/qcom/msm8916.dtsi

+4 −4

Original line number	Diff line number	Diff line
		@@ -111,7 +111,7 @@
		next-level-cache = <&L2_0>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SPC>;
		clocks = <&apcs 0>;
		clocks = <&apcs>;
		operating-points-v2 = <&cpu_opp_table>;
		#cooling-cells = <2>;
		};
		@@ -123,7 +123,7 @@
		next-level-cache = <&L2_0>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SPC>;
		clocks = <&apcs 0>;
		clocks = <&apcs>;
		operating-points-v2 = <&cpu_opp_table>;
		#cooling-cells = <2>;
		};
		@@ -135,7 +135,7 @@
		next-level-cache = <&L2_0>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SPC>;
		clocks = <&apcs 0>;
		clocks = <&apcs>;
		operating-points-v2 = <&cpu_opp_table>;
		#cooling-cells = <2>;
		};
		@@ -147,7 +147,7 @@
		next-level-cache = <&L2_0>;
		enable-method = "psci";
		cpu-idle-states = <&CPU_SPC>;
		clocks = <&apcs 0>;
		clocks = <&apcs>;
		operating-points-v2 = <&cpu_opp_table>;
		#cooling-cells = <2>;
		};

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