Commit e4d8b05a authored by Wesley Cheng's avatar Wesley Cheng Committed by Vinod Koul
Browse files

phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB 



The register map for SM8150 QMP USB SSPHY has moved
QPHY_POWER_DOWN_CONTROL to a different offset.  Allow for
an offset in the register table to override default value
if it is a DP capable PHY.

Signed-off-by: default avatarWesley Cheng <wcheng@codeaurora.org>
Reviewed-by: default avatarManu Gautam <mgautam@codeaurora.org>
Link: https://lore.kernel.org/r/1588636467-23409-5-git-send-email-wcheng@codeaurora.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 9a24b929

drivers/phy/qualcomm/phy-qcom-qmp.c

+19 −4
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ enum qphy_reg_layout { 
	QPHY_PCS_AUTONOMOUS_MODE_CTRL,

	QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR,

	QPHY_PCS_LFPS_RXTERM_IRQ_STATUS,

	QPHY_PCS_POWER_DOWN_CONTROL,

};



static const unsigned int msm8996_ufsphy_regs_layout[] = {
@@ -181,6 +182,7 @@ static const unsigned int qmp_v4_usb3phy_regs_layout[] = { 
	[QPHY_SW_RESET]			= 0x00,

	[QPHY_START_CTRL]		= 0x44,

	[QPHY_PCS_STATUS]		= 0x14,

	[QPHY_PCS_POWER_DOWN_CONTROL]	= 0x40,

};



static const unsigned int sdm845_ufsphy_regs_layout[] = {
@@ -2029,11 +2031,18 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) 
			     SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);

	}



	if (cfg->has_phy_com_ctrl)

	if (cfg->has_phy_com_ctrl) {

		qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],

			     SW_PWRDN);

	} else {

		if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL])

			qphy_setbits(pcs,

					cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

					cfg->pwrdn_ctrl);

		else

		qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);

			qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL,

					cfg->pwrdn_ctrl);

	}



	/* Serdes configuration */

	qcom_qmp_phy_configure(serdes, cfg->regs, cfg->serdes_tbl,
@@ -2259,7 +2268,13 @@ static int qcom_qmp_phy_disable(struct phy *phy) 
	qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);



	/* Put PHY into POWER DOWN state: active low */

	qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);

	if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) {

		qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],

			     cfg->pwrdn_ctrl);

	} else {

		qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,

				cfg->pwrdn_ctrl);

	}



	if (cfg->has_lane_rst)

		reset_control_assert(qphy->lane_rst);

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