Commit e4923387 authored by Stylon Wang's avatar Stylon Wang Committed by Alex Deucher
Browse files

drm/amd/display: Adjust refactored dm for color management only 



[Why]
Commit cdde482c is causing regression
from changing the order of call sequence.

[How]
Keep the call sequence and take in extra dm state only if plane-level
color management is enabled.

Fixes: cdde482c ("drm/amd/display: Refactor color management to take dm plane state")
Signed-off-by: default avatarStylon Wang <stylon.wang@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4dc0b814

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+12 −11
Original line number Diff line number Diff line
@@ -3698,12 +3698,11 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, 
}



static int fill_dc_plane_attributes(struct amdgpu_device *adev,

				    struct dm_plane_state *dm_plane_state,

				    struct dc_plane_state *dc_plane_state,

				    struct drm_plane_state *plane_state,

				    struct drm_crtc_state *crtc_state)

{

	struct dm_crtc_state *dm_crtc_state = to_dm_crtc_state(crtc_state);

	struct dc_plane_state *dc_plane_state = dm_plane_state->dc_state;

	const struct amdgpu_framebuffer *amdgpu_fb =

		to_amdgpu_framebuffer(plane_state->fb);

	struct dc_scaling_info scaling_info;
@@ -3749,7 +3748,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, 
	 * Always set input transfer function, since plane state is refreshed

	 * every time.

	 */

	ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dm_plane_state);

	ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);

	if (ret)

		return ret;
@@ -7942,6 +7941,16 @@ static int dm_update_plane_state(struct dc *dc, 
		DRM_DEBUG_DRIVER("Enabling DRM plane: %d on DRM crtc %d\n",

				plane->base.id, new_plane_crtc->base.id);



		ret = fill_dc_plane_attributes(

			new_plane_crtc->dev->dev_private,

			dc_new_plane_state,

			new_plane_state,

			new_crtc_state);

		if (ret) {

			dc_plane_state_release(dc_new_plane_state);

			return ret;

		}



		ret = dm_atomic_get_state(state, &dm_state);

		if (ret) {

			dc_plane_state_release(dc_new_plane_state);
@@ -7967,14 +7976,6 @@ static int dm_update_plane_state(struct dc *dc, 


		dm_new_plane_state->dc_state = dc_new_plane_state;



		ret = fill_dc_plane_attributes(

			new_plane_crtc->dev->dev_private,

			dm_new_plane_state,

			new_plane_state,

			new_crtc_state);

		if (ret)

			return ret;



		/* Tell DC to do a full surface update every time there

		 * is a plane change. Inefficient, but works for now.

		 */

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

+1 −1
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, 
void amdgpu_dm_init_color_mod(void);

int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);

int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

				      struct dm_plane_state *plane);

				      struct dc_plane_state *dc_plane_state);



void amdgpu_dm_update_connector_after_detect(

		struct amdgpu_dm_connector *aconnector);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

+1 −2
Original line number Diff line number Diff line
@@ -416,10 +416,9 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc) 
 * Returns 0 on success.

 */

int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

				      struct dm_plane_state *plane)

				      struct dc_plane_state *dc_plane_state)

{

	const struct drm_color_lut *degamma_lut;

	struct dc_plane_state *dc_plane_state = plane->dc_state;

	enum dc_transfer_func_predefined tf = TRANSFER_FUNCTION_SRGB;

	uint32_t degamma_size;

	int r;

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