Commit e41ceed0 authored by Jungseok Lee's avatar Jungseok Lee Committed by Catalin Marinas
Browse files

arm64: Introduce VA_BITS and translation level options 

This patch adds virtual address space size and a level of translation
tables to kernel configuration. It facilicates introduction of
different MMU options, such as 4KB + 4 levels, 16KB + 4 levels and
64KB + 3 levels, easily.

The idea is based on the discussion with Catalin Marinas:
http://www.spinics.net/linux/lists/arm-kernel/msg319552.html



Signed-off-by: default avatarJungseok Lee <jays.lee@samsung.com>
Reviewed-by: default avatarSungjinn Chung <sungjinn.chung@samsung.com>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Reviewed-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarJungseok Lee <jungseoklee85@gmail.com>
parent 7edd88ad

arch/arm64/Kconfig

+44 −1
Original line number Diff line number Diff line
@@ -157,14 +157,57 @@ endmenu 


menu "Kernel Features"



choice

	prompt "Page size"

	default ARM64_4K_PAGES

	help

	  Page size (translation granule) configuration.



config ARM64_4K_PAGES

	bool "4KB"

	help

	  This feature enables 4KB pages support.



config ARM64_64K_PAGES

	bool "Enable 64KB pages support"

	bool "64KB"

	help

	  This feature enables 64KB pages support (4KB by default)

	  allowing only two levels of page tables and faster TLB

	  look-up. AArch32 emulation is not available when this feature

	  is enabled.



endchoice



choice

	prompt "Virtual address space size"

	default ARM64_VA_BITS_39 if ARM64_4K_PAGES

	default ARM64_VA_BITS_42 if ARM64_64K_PAGES

	help

	  Allows choosing one of multiple possible virtual address

	  space sizes. The level of translation table is determined by

	  a combination of page size and virtual address space size.



config ARM64_VA_BITS_39

	bool "39-bit"

	depends on ARM64_4K_PAGES



config ARM64_VA_BITS_42

	bool "42-bit"

	depends on ARM64_64K_PAGES



endchoice



config ARM64_VA_BITS

	int

	default 39 if ARM64_VA_BITS_39

	default 42 if ARM64_VA_BITS_42



config ARM64_2_LEVELS

	def_bool y if ARM64_64K_PAGES && ARM64_VA_BITS_42



config ARM64_3_LEVELS

	def_bool y if ARM64_4K_PAGES && ARM64_VA_BITS_39



config CPU_BIG_ENDIAN

       bool "Build big-endian kernel"

       help

arch/arm64/include/asm/memory.h

+1 −5
Original line number Diff line number Diff line
@@ -41,11 +41,7 @@ 
 * The module space lives between the addresses given by TASK_SIZE

 * and PAGE_OFFSET - it must be within 128MB of the kernel text.

 */

#ifdef CONFIG_ARM64_64K_PAGES

#define VA_BITS			(42)

#else

#define VA_BITS			(39)

#endif

#define VA_BITS			(CONFIG_ARM64_VA_BITS)

#define PAGE_OFFSET		(UL(0xffffffffffffffff) << (VA_BITS - 1))

#define MODULES_END		(PAGE_OFFSET)

#define MODULES_VADDR		(MODULES_END - SZ_64M)

arch/arm64/include/asm/page.h

+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 


#ifndef __ASSEMBLY__



#ifdef CONFIG_ARM64_64K_PAGES

#ifdef CONFIG_ARM64_2_LEVELS

#include <asm/pgtable-2level-types.h>

#else

#include <asm/pgtable-3level-types.h>

arch/arm64/include/asm/pgalloc.h

+2 −2
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


#define check_pgt_cache()		do { } while (0)



#ifndef CONFIG_ARM64_64K_PAGES

#ifndef CONFIG_ARM64_2_LEVELS



static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)

{
@@ -44,7 +44,7 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) 
	set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));

}



#endif	/* CONFIG_ARM64_64K_PAGES */

#endif	/* CONFIG_ARM64_2_LEVELS */



extern pgd_t *pgd_alloc(struct mm_struct *mm);

extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);

arch/arm64/include/asm/pgtable-hwdef.h

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
#ifndef __ASM_PGTABLE_HWDEF_H

#define __ASM_PGTABLE_HWDEF_H



#ifdef CONFIG_ARM64_64K_PAGES

#ifdef CONFIG_ARM64_2_LEVELS

#include <asm/pgtable-2level-hwdef.h>

#else

#include <asm/pgtable-3level-hwdef.h>

CRA Git | Maintained and supported by SUSTech CRA and CCSE