Commit e409b128 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: separate UVD code v3 



Our different hardware blocks are actually completely
separated, so it doesn't make much sense any more to
structure the code by pure chipset generations.

Start restructuring the code by separating our the UVD block.

v2: updated commit message
v3: rebased and restructurized start/stop functions for kv dpm.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2e1e6dad

drivers/gpu/drm/radeon/Makefile

+8 −0
Original line number Diff line number Diff line
@@ -82,6 +82,14 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \ 
	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \

	ci_dpm.o



# add UVD block

radeon-y += \

	radeon_uvd.o \

	uvd_v1_0.o \

	uvd_v2_2.o \

	uvd_v3_1.o \

	uvd_v4_2.o



radeon-$(CONFIG_COMPAT) += radeon_ioc32.o

radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o

radeon-$(CONFIG_ACPI) += radeon_acpi.o

drivers/gpu/drm/radeon/cik.c

+4 −37
Original line number Diff line number Diff line
@@ -69,7 +69,6 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev); 
static void cik_program_aspm(struct radeon_device *rdev);

static void cik_init_pg(struct radeon_device *rdev);

static void cik_init_cg(struct radeon_device *rdev);

void cik_uvd_resume(struct radeon_device *rdev);



/* get temperature in millidegrees */

int ci_get_temp(struct radeon_device *rdev)
@@ -7616,9 +7615,8 @@ static int cik_startup(struct radeon_device *rdev) 
		return r;

	}



	r = radeon_uvd_resume(rdev);

	r = uvd_v4_2_resume(rdev);

	if (!r) {

		cik_uvd_resume(rdev);

		r = radeon_fence_driver_start_ring(rdev,

						   R600_RING_TYPE_UVD_INDEX);

		if (r)
@@ -7705,7 +7703,7 @@ static int cik_startup(struct radeon_device *rdev) 
				     UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,

				     RADEON_CP_PACKET2);

		if (!r)

			r = r600_uvd_init(rdev, true);

			r = uvd_v1_0_init(rdev);

		if (r)

			DRM_ERROR("radeon: failed initializing UVD (%d).\n", r);

	}
@@ -7770,7 +7768,7 @@ int cik_suspend(struct radeon_device *rdev) 
	radeon_vm_manager_fini(rdev);

	cik_cp_enable(rdev, false);

	cik_sdma_enable(rdev, false);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_suspend(rdev);

	cik_irq_suspend(rdev);

	radeon_wb_disable(rdev);
@@ -7934,7 +7932,7 @@ void cik_fini(struct radeon_device *rdev) 
	radeon_vm_manager_fini(rdev);

	radeon_ib_pool_fini(rdev);

	radeon_irq_kms_fini(rdev);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_fini(rdev);

	cik_pcie_gart_fini(rdev);

	r600_vram_scratch_fini(rdev);
@@ -8595,37 +8593,6 @@ int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) 
	return r;

}



void cik_uvd_resume(struct radeon_device *rdev)

{

	uint64_t addr;

	uint32_t size;



	/* programm the VCPU memory controller bits 0-27 */

	addr = rdev->uvd.gpu_addr >> 3;

	size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;

	WREG32(UVD_VCPU_CACHE_OFFSET0, addr);

	WREG32(UVD_VCPU_CACHE_SIZE0, size);



	addr += size;

	size = RADEON_UVD_STACK_SIZE >> 3;

	WREG32(UVD_VCPU_CACHE_OFFSET1, addr);

	WREG32(UVD_VCPU_CACHE_SIZE1, size);



	addr += size;

	size = RADEON_UVD_HEAP_SIZE >> 3;

	WREG32(UVD_VCPU_CACHE_OFFSET2, addr);

	WREG32(UVD_VCPU_CACHE_SIZE2, size);



	/* bits 28-31 */

	addr = (rdev->uvd.gpu_addr >> 28) & 0xF;

	WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));



	/* bits 32-39 */

	addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;

	WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));



}



static void cik_pcie_gen3_enable(struct radeon_device *rdev)

{

	struct pci_dev *root = rdev->pdev->bus->self;

drivers/gpu/drm/radeon/evergreen.c

+4 −4
Original line number Diff line number Diff line
@@ -5239,7 +5239,7 @@ static int evergreen_startup(struct radeon_device *rdev) 
		return r;

	}



	r = rv770_uvd_resume(rdev);

	r = uvd_v2_2_resume(rdev);

	if (!r) {

		r = radeon_fence_driver_start_ring(rdev,

						   R600_RING_TYPE_UVD_INDEX);
@@ -5295,7 +5295,7 @@ static int evergreen_startup(struct radeon_device *rdev) 
				     UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,

				     RADEON_CP_PACKET2);

		if (!r)

			r = r600_uvd_init(rdev, true);

			r = uvd_v1_0_init(rdev);



		if (r)

			DRM_ERROR("radeon: error initializing UVD (%d).\n", r);
@@ -5350,7 +5350,7 @@ int evergreen_resume(struct radeon_device *rdev) 
int evergreen_suspend(struct radeon_device *rdev)

{

	r600_audio_fini(rdev);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_suspend(rdev);

	r700_cp_stop(rdev);

	r600_dma_stop(rdev);
@@ -5487,7 +5487,7 @@ void evergreen_fini(struct radeon_device *rdev) 
	radeon_ib_pool_fini(rdev);

	radeon_irq_kms_fini(rdev);

	evergreen_pcie_gart_fini(rdev);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_fini(rdev);

	r600_vram_scratch_fini(rdev);

	radeon_gem_fini(rdev);

drivers/gpu/drm/radeon/kv_dpm.c

+4 −7
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include "cikd.h"

#include "r600_dpm.h"

#include "kv_dpm.h"

#include "radeon_asic.h"

#include <linux/seq_file.h>



#define KV_MAX_DEEPSLEEP_DIVIDER_ID     5
@@ -59,10 +60,6 @@ extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); 
extern void cik_update_cg(struct radeon_device *rdev,

			  u32 block, bool enable);



extern void cik_uvd_resume(struct radeon_device *rdev);

extern int r600_uvd_init(struct radeon_device *rdev, bool ring_test);

extern void r600_do_uvd_stop(struct radeon_device *rdev);



static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] =

{

	{  0,       4,        1    },
@@ -1473,7 +1470,7 @@ void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) 
	pi->uvd_power_gated = gate;



	if (gate) {

		r600_do_uvd_stop(rdev);

		uvd_v1_0_stop(rdev);

		cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, false);

		kv_update_uvd_dpm(rdev, gate);

		if (pi->caps_uvd_pg)
@@ -1481,8 +1478,8 @@ void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate) 
	} else {

		if (pi->caps_uvd_pg)

			kv_notify_message_to_smu(rdev, PPSMC_MSG_UVDPowerON);

		cik_uvd_resume(rdev);

		r600_uvd_init(rdev, false);

		uvd_v4_2_resume(rdev);

		uvd_v1_0_start(rdev);

		cik_update_cg(rdev, RADEON_CG_BLOCK_UVD, true);

		kv_update_uvd_dpm(rdev, gate);

	}

drivers/gpu/drm/radeon/ni.c

+4 −21
Original line number Diff line number Diff line
@@ -1373,23 +1373,6 @@ void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) 
	radeon_ring_write(ring, 10); /* poll interval */

}



void cayman_uvd_semaphore_emit(struct radeon_device *rdev,

			       struct radeon_ring *ring,

			       struct radeon_semaphore *semaphore,

			       bool emit_wait)

{

	uint64_t addr = semaphore->gpu_addr;



	radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));

	radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);



	radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));

	radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);



	radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));

	radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0));

}



static void cayman_cp_enable(struct radeon_device *rdev, bool enable)

{

	if (enable)
@@ -2141,7 +2124,7 @@ static int cayman_startup(struct radeon_device *rdev) 
		return r;

	}



	r = rv770_uvd_resume(rdev);

	r = uvd_v2_2_resume(rdev);

	if (!r) {

		r = radeon_fence_driver_start_ring(rdev,

						   R600_RING_TYPE_UVD_INDEX);
@@ -2229,7 +2212,7 @@ static int cayman_startup(struct radeon_device *rdev) 
				     UVD_RBC_RB_RPTR, UVD_RBC_RB_WPTR,

				     RADEON_CP_PACKET2);

		if (!r)

			r = r600_uvd_init(rdev, true);

			r = uvd_v1_0_init(rdev);

		if (r)

			DRM_ERROR("radeon: failed initializing UVD (%d).\n", r);

	}
@@ -2283,7 +2266,7 @@ int cayman_suspend(struct radeon_device *rdev) 
	radeon_vm_manager_fini(rdev);

	cayman_cp_enable(rdev, false);

	cayman_dma_stop(rdev);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_suspend(rdev);

	evergreen_irq_suspend(rdev);

	radeon_wb_disable(rdev);
@@ -2414,7 +2397,7 @@ void cayman_fini(struct radeon_device *rdev) 
	radeon_vm_manager_fini(rdev);

	radeon_ib_pool_fini(rdev);

	radeon_irq_kms_fini(rdev);

	r600_uvd_stop(rdev);

	uvd_v1_0_fini(rdev);

	radeon_uvd_fini(rdev);

	cayman_pcie_gart_fini(rdev);

	r600_vram_scratch_fini(rdev);

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