Merge tag 'stm32-dt-for-v4.6-2' of... (e3c739e1) · Commits · 戴 / test

arch/arm/boot/dts/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -622,6 +622,7 @@ dtb-$(CONFIG_ARCH_STI) += \
		stih418-b2199.dtb
		dtb-$(CONFIG_ARCH_STM32)+= \
		stm32f429-disco.dtb \
		stm32f469-disco.dtb \
		stm32429i-eval.dtb
		dtb-$(CONFIG_MACH_SUN4I) += \
		sun4i-a10-a1000.dtb \

arch/arm/boot/dts/stm32429i-eval.dts

+31 −0

Original line number	Diff line number	Diff line
		@@ -81,14 +81,45 @@
		gpios = <&gpiog 12 1>;
		};
		};

		usbotg_hs_phy: usbphy {
		#phy-cells = <0>;
		compatible = "usb-nop-xceiv";
		clocks = <&rcc 0 30>;
		clock-names = "main_clk";
		};
		};

		&clk_hse {
		clock-frequency = <25000000>;
		};

		&ethernet0 {
		status = "okay";
		pinctrl-0 = <&ethernet0_mii>;
		pinctrl-names = "default";
		phy-mode = "mii-id";
		mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy1: ethernet-phy@1 {
		reg = <1>;
		};
		};
		};

		&usart1 {
		pinctrl-0 = <&usart1_pins_a>;
		pinctrl-names = "default";
		status = "okay";
		};

		&usbotg_hs {
		dr_mode = "host";
		phys = <&usbotg_hs_phy>;
		phy-names = "usb2-phy";
		pinctrl-0 = <&usbotg_hs_pins_a>;
		pinctrl-names = "default";
		status = "okay";
		};

arch/arm/boot/dts/stm32f429.dtsi

+81 −11

Original line number	Diff line number	Diff line
		@@ -171,6 +171,11 @@
		status = "disabled";
		};

		syscfg: system-config@40013800 {
		compatible = "syscon";
		reg = <0x40013800 0x400>;
		};

		pin-controller {
		#address-cells = <1>;
		#size-cells = <1>;
		@@ -182,7 +187,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x0 0x400>;
		clocks = <&rcc 0 256>;
		clocks = <&rcc 0 0>;
		st,bank-name = "GPIOA";
		};

		@@ -190,7 +195,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x400 0x400>;
		clocks = <&rcc 0 257>;
		clocks = <&rcc 0 1>;
		st,bank-name = "GPIOB";
		};

		@@ -198,7 +203,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x800 0x400>;
		clocks = <&rcc 0 258>;
		clocks = <&rcc 0 2>;
		st,bank-name = "GPIOC";
		};

		@@ -206,7 +211,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0xc00 0x400>;
		clocks = <&rcc 0 259>;
		clocks = <&rcc 0 3>;
		st,bank-name = "GPIOD";
		};

		@@ -214,7 +219,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x1000 0x400>;
		clocks = <&rcc 0 260>;
		clocks = <&rcc 0 4>;
		st,bank-name = "GPIOE";
		};

		@@ -222,7 +227,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x1400 0x400>;
		clocks = <&rcc 0 261>;
		clocks = <&rcc 0 5>;
		st,bank-name = "GPIOF";
		};

		@@ -230,7 +235,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x1800 0x400>;
		clocks = <&rcc 0 262>;
		clocks = <&rcc 0 6>;
		st,bank-name = "GPIOG";
		};

		@@ -238,7 +243,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x1c00 0x400>;
		clocks = <&rcc 0 263>;
		clocks = <&rcc 0 7>;
		st,bank-name = "GPIOH";
		};

		@@ -246,7 +251,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x2000 0x400>;
		clocks = <&rcc 0 264>;
		clocks = <&rcc 0 8>;
		st,bank-name = "GPIOI";
		};

		@@ -254,7 +259,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x2400 0x400>;
		clocks = <&rcc 0 265>;
		clocks = <&rcc 0 9>;
		st,bank-name = "GPIOJ";
		};

		@@ -262,7 +267,7 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x2800 0x400>;
		clocks = <&rcc 0 266>;
		clocks = <&rcc 0 10>;
		st,bank-name = "GPIOK";
		};

		@@ -278,6 +283,46 @@
		bias-disable;
		};
		};

		usbotg_hs_pins_a: usbotg_hs@0 {
		pins {
		pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
		<STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>,
		<STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>,
		<STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>,
		<STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>,
		<STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>,
		<STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>,
		<STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>,
		<STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>,
		<STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>,
		<STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>,
		<STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>;
		bias-disable;
		drive-push-pull;
		slew-rate = <2>;
		};
		};

		ethernet0_mii: mii@0 {
		pins {
		pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
		<STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
		<STM32F429_PC2_FUNC_ETH_MII_TXD2>,
		<STM32F429_PB8_FUNC_ETH_MII_TXD3>,
		<STM32F429_PC3_FUNC_ETH_MII_TX_CLK>,
		<STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
		<STM32F429_PA2_FUNC_ETH_MDIO>,
		<STM32F429_PC1_FUNC_ETH_MDC>,
		<STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
		<STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
		<STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
		<STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>,
		<STM32F429_PH6_FUNC_ETH_MII_RXD2>,
		<STM32F429_PH7_FUNC_ETH_MII_RXD3>;
		slew-rate = <2>;
		};
		};
		};

		rcc: rcc@40023810 {
		@@ -318,6 +363,31 @@
		st,mem2mem;
		};

		ethernet0: dwmac@40028000 {
		compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
		reg = <0x40028000 0x8000>;
		reg-names = "stmmaceth";
		interrupts = <61>, <62>;
		interrupt-names = "macirq", "eth_wake_irq";
		clock-names = "stmmaceth", "tx-clk", "rx-clk";
		clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
		st,syscon = <&syscfg 0x4>;
		snps,pbl = <8>;
		snps,mixed-burst;
		dma-ranges;
		status = "disabled";
		};

		usbotg_hs: usb@40040000 {
		compatible = "snps,dwc2";
		dma-ranges;
		reg = <0x40040000 0x40000>;
		interrupts = <77>;
		clocks = <&rcc 0 29>;
		clock-names = "otg";
		status = "disabled";
		};

		rng: rng@50060800 {
		compatible = "st,stm32-rng";
		reg = <0x50060800 0x400>;

arch/arm/boot/dts/stm32f469-disco.dts

0 → 100644

+75 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright 2016 - Lee Jones <lee.jones@linaro.org>
		*
		* This file is dual-licensed: you can use it either under the terms
		* of the GPL or the X11 license, at your option. Note that this dual
		* licensing only applies to this file, and not this project as a
		* whole.
		*
		* a) This file is free software; you can redistribute it and/or
		* modify it under the terms of the GNU General Public License as
		* published by the Free Software Foundation; either version 2 of the
		* License, or (at your option) any later version.
		*
		* This file is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* You should have received a copy of the GNU General Public
		* License along with this file; if not, write to the Free
		* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
		* MA 02110-1301 USA
		*
		* Or, alternatively,
		*
		* b) Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		* files (the "Software"), to deal in the Software without
		* restriction, including without limitation the rights to use,
		* copy, modify, merge, publish, distribute, sublicense, and/or
		* sell copies of the Software, and to permit persons to whom the
		* Software is furnished to do so, subject to the following
		* conditions:
		*
		* The above copyright notice and this permission notice shall be
		* included in all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
		* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
		* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
		* OTHER DEALINGS IN THE SOFTWARE.
		*/

		/dts-v1/;
		#include "stm32f429.dtsi"

		/ {
		model = "STMicroelectronics STM32F469i-DISCO board";
		compatible = "st,stm32f469i-disco", "st,stm32f469";

		chosen {
		bootargs = "root=/dev/ram rdinit=/linuxrc";
		stdout-path = "serial0:115200n8";
		};

		memory {
		reg = <0x00000000 0x800000>;
		};

		aliases {
		serial0 = &usart3;
		};
		};

		&clk_hse {
		clock-frequency = <8000000>;
		};

		&usart3 {
		status = "okay";
		};

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