arm64: insn: add encoder for MOV (register) (e3bf8a67) · Commits · 戴 / test

For FTRACE_WITH_REGS, we're going to want to generate a MOV (register) instruction as part of the callsite intialization. As MOV (register) is an alias for ORR (shifted register), we can generate this with aarch64_insn_gen_logical_shifted_reg(), but it's somewhat verbose and difficult to read in-context. Add a aarch64_insn_gen_move_reg() wrapper for this case so that we can write callers in a more straightforward way. Signed-off-by:

Mark Rutland <mark.rutland@arm.com> Reviewed-by:

Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:

Torsten Duwe <duwe@suse.de> Tested-by:

Amit Daniel Kachhap <amit.kachhap@arm.com> Tested-by:

Torsten Duwe <duwe@suse.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org>

arch/arm64/include/asm/insn.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -440,6 +440,9 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
		int shift,
		enum aarch64_insn_variant variant,
		enum aarch64_insn_logic_type type);
		u32 aarch64_insn_gen_move_reg(enum aarch64_insn_register dst,
		enum aarch64_insn_register src,
		enum aarch64_insn_variant variant);
		u32 aarch64_insn_gen_logical_immediate(enum aarch64_insn_logic_type type,
		enum aarch64_insn_variant variant,
		enum aarch64_insn_register Rn,

arch/arm64/kernel/insn.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -1268,6 +1268,19 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
		return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_6, insn, shift);
		}

		/*
		* MOV (register) is architecturally an alias of ORR (shifted register) where
		* MOV <d>, <m> is equivalent to ORR <d>, <ZR>, <*m>
		*/
		u32 aarch64_insn_gen_move_reg(enum aarch64_insn_register dst,
		enum aarch64_insn_register src,
		enum aarch64_insn_variant variant)
		{
		return aarch64_insn_gen_logical_shifted_reg(dst, AARCH64_INSN_REG_ZR,
		src, 0, variant,
		AARCH64_INSN_LOGIC_ORR);
		}

		u32 aarch64_insn_gen_adr(unsigned long pc, unsigned long addr,
		enum aarch64_insn_register reg,
		enum aarch64_insn_adr_type type)

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