Commit e3bc8004 authored by Mathias Nyman's avatar Mathias Nyman Committed by Greg Kroah-Hartman
Browse files

xhci: Don't pass struct xhci_hcd pointer to xhci_link_seg() 



It's only used to dig out if we need to set a chain flag for specific
hosts. Pass the flag directly as a parameter instead.

No functional changes.

xhci_link_seg() is also used by DbC code, this change helps decoupling
xhci and DbC.

Signed-off-by: default avatarMathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/20200723144530.9992-4-mathias.nyman@linux.intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5b43a2a8

drivers/usb/host/xhci-mem.c

+20 −11
Original line number Diff line number Diff line
@@ -96,8 +96,9 @@ static void xhci_free_segments_for_ring(struct xhci_hcd *xhci, 
 * DMA address of the next segment.  The caller needs to set any Link TRB

 * related flags, such as End TRB, Toggle Cycle, and no snoop.

 */

static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,

		struct xhci_segment *next, enum xhci_ring_type type)

static void xhci_link_segments(struct xhci_segment *prev,

			       struct xhci_segment *next,

			       enum xhci_ring_type type, bool chain_links)

{

	u32 val;
@@ -112,11 +113,7 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, 
		val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);

		val &= ~TRB_TYPE_BITMASK;

		val |= TRB_TYPE(TRB_LINK);

		/* Always set the chain bit with 0.95 hardware */

		/* Set chain bit for isoc rings on AMD 0.96 host */

		if (xhci_link_trb_quirk(xhci) ||

				(type == TYPE_ISOC &&

				 (xhci->quirks & XHCI_AMD_0x96_HOST)))

		if (chain_links)

			val |= TRB_CHAIN;

		prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);

	}
@@ -131,13 +128,19 @@ static void xhci_link_rings(struct xhci_hcd *xhci, struct xhci_ring *ring, 
		unsigned int num_segs)

{

	struct xhci_segment *next;

	bool chain_links;



	if (!ring || !first || !last)

		return;



	/* Set chain bit for 0.95 hosts, and for isoc rings on AMD 0.96 host */

	chain_links = !!(xhci_link_trb_quirk(xhci) ||

			 (ring->type == TYPE_ISOC &&

			  (xhci->quirks & XHCI_AMD_0x96_HOST)));



	next = ring->enq_seg->next;

	xhci_link_segments(xhci, ring->enq_seg, first, ring->type);

	xhci_link_segments(xhci, last, next, ring->type);

	xhci_link_segments(ring->enq_seg, first, ring->type, chain_links);

	xhci_link_segments(last, next, ring->type, chain_links);

	ring->num_segs += num_segs;

	ring->num_trbs_free += (TRBS_PER_SEGMENT - 1) * num_segs;
@@ -321,6 +324,12 @@ static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci, 
		enum xhci_ring_type type, unsigned int max_packet, gfp_t flags)

{

	struct xhci_segment *prev;

	bool chain_links;



	/* Set chain bit for 0.95 hosts, and for isoc rings on AMD 0.96 host */

	chain_links = !!(xhci_link_trb_quirk(xhci) ||

			 (type == TYPE_ISOC &&

			  (xhci->quirks & XHCI_AMD_0x96_HOST)));



	prev = xhci_segment_alloc(xhci, cycle_state, max_packet, flags);

	if (!prev)
@@ -341,12 +350,12 @@ static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci, 
			}

			return -ENOMEM;

		}

		xhci_link_segments(xhci, prev, next, type);

		xhci_link_segments(prev, next, type, chain_links);



		prev = next;

		num_segs--;

	}

	xhci_link_segments(xhci, prev, *first, type);

	xhci_link_segments(prev, *first, type, chain_links);

	*last = prev;



	return 0;

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