Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx (e38c1e54) · Commits · 戴 / test

arch/arm/mach-ux500/clock.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -411,7 +411,7 @@ static struct clk_lookup u8500_common_clks[] = {
		CLK(apetraceclk, "apetrace", NULL),
		CLK(mcdeclk, "mcde", NULL),
		CLK(ipi2clk, "ipi2", NULL),
		CLK(dmaclk, "dma40", NULL),
		CLK(dmaclk, "dma40.0", NULL),
		CLK(b2r2clk, "b2r2", NULL),
		CLK(tvclk, "tv", NULL),
		};

arch/arm/mach-ux500/cpu-db8500.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,7 @@ static struct platform_device *platform_devs[] __initdata = {
		&u8500_gpio_devs[6],
		&u8500_gpio_devs[7],
		&u8500_gpio_devs[8],
		&u8500_dma40_device,
		};

		/* minimum static i/o mapping required to boot U8500 platforms */
		@@ -71,6 +72,9 @@ void __init u8500_init_devices(void)
		{
		ux500_init_devices();

		if (cpu_is_u8500ed())
		dma40_u8500ed_fixup();

		/* Register the platform devices */
		platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));

arch/arm/mach-ux500/devices-db8500.c

+109 −0

Original line number	Diff line number	Diff line
		@@ -12,9 +12,13 @@
		#include <linux/gpio.h>
		#include <linux/amba/bus.h>

		#include <plat/ste_dma40.h>

		#include <mach/hardware.h>
		#include <mach/setup.h>

		#include "ste-dma40-db8500.h"

		static struct nmk_gpio_platform_data u8500_gpio_data[] = {
		GPIO_DATA("GPIO-0-31", 0),
		GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
		@@ -105,3 +109,108 @@ struct platform_device u8500_i2c4_device = {
		.resource = u8500_i2c4_resources,
		.num_resources = ARRAY_SIZE(u8500_i2c4_resources),
		};

		static struct resource dma40_resources[] = {
		[0] = {
		.start = U8500_DMA_BASE,
		.end = U8500_DMA_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
		.name = "base",
		},
		[1] = {
		.start = U8500_DMA_LCPA_BASE,
		.end = U8500_DMA_LCPA_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
		.name = "lcpa",
		},
		[2] = {
		.start = U8500_DMA_LCLA_BASE,
		.end = U8500_DMA_LCLA_BASE + 16 * 1024 - 1,
		.flags = IORESOURCE_MEM,
		.name = "lcla",
		},
		[3] = {
		.start = IRQ_DMA,
		.end = IRQ_DMA,
		.flags = IORESOURCE_IRQ}
		};

		/* Default configuration for physcial memcpy */
		struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
		.channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE \|
		STEDMA40_LOW_PRIORITY_CHANNEL \|
		STEDMA40_PCHAN_BASIC_MODE),
		.dir = STEDMA40_MEM_TO_MEM,

		.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
		.src_info.data_width = STEDMA40_BYTE_WIDTH,
		.src_info.psize = STEDMA40_PSIZE_PHY_1,

		.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
		.dst_info.data_width = STEDMA40_BYTE_WIDTH,
		.dst_info.psize = STEDMA40_PSIZE_PHY_1,

		};
		/* Default configuration for logical memcpy */
		struct stedma40_chan_cfg dma40_memcpy_conf_log = {
		.channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE \|
		STEDMA40_LOW_PRIORITY_CHANNEL \|
		STEDMA40_LCHAN_SRC_LOG_DST_LOG \|
		STEDMA40_NO_TIM_FOR_LINK),
		.dir = STEDMA40_MEM_TO_MEM,

		.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
		.src_info.data_width = STEDMA40_BYTE_WIDTH,
		.src_info.psize = STEDMA40_PSIZE_LOG_1,

		.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
		.dst_info.data_width = STEDMA40_BYTE_WIDTH,
		.dst_info.psize = STEDMA40_PSIZE_LOG_1,

		};

		/*
		* Mapping between destination event lines and physical device address.
		* The event line is tied to a device and therefor the address is constant.
		*/
		static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV];

		/* Mapping between source event lines and physical device address */
		static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV];

		/* Reserved event lines for memcpy only */
		static int dma40_memcpy_event[] = {
		STEDMA40_MEMCPY_TX_1,
		STEDMA40_MEMCPY_TX_2,
		STEDMA40_MEMCPY_TX_3,
		STEDMA40_MEMCPY_TX_4,
		};

		static struct stedma40_platform_data dma40_plat_data = {
		.dev_len = STEDMA40_NR_DEV,
		.dev_rx = dma40_rx_map,
		.dev_tx = dma40_tx_map,
		.memcpy = dma40_memcpy_event,
		.memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
		.memcpy_conf_phy = &dma40_memcpy_conf_phy,
		.memcpy_conf_log = &dma40_memcpy_conf_log,
		.llis_per_log = 8,
		};

		struct platform_device u8500_dma40_device = {
		.dev = {
		.platform_data = &dma40_plat_data,
		},
		.name = "dma40",
		.id = 0,
		.num_resources = ARRAY_SIZE(dma40_resources),
		.resource = dma40_resources
		};

		void dma40_u8500ed_fixup(void)
		{
		dma40_plat_data.memcpy = NULL;
		dma40_plat_data.memcpy_len = 0;
		dma40_resources[0].start = U8500_DMA_BASE_ED;
		dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
		}

arch/arm/mach-ux500/include/mach/db8500-regs.h

+12 −0

Original line number	Diff line number	Diff line
		@@ -7,6 +7,18 @@
		#ifndef __MACH_DB8500_REGS_H
		#define __MACH_DB8500_REGS_H

		/* Base address and bank offsets for ESRAM */
		#define U8500_ESRAM_BASE 0x40000000
		#define U8500_ESRAM_BANK_SIZE 0x00020000
		#define U8500_ESRAM_BANK0 U8500_ESRAM_BASE
		#define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE)
		#define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)
		#define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)
		#define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)
		/* Use bank 4 for DMA LCLA and LCPA */
		#define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4
		#define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK4 + 0x4000)

		#define U8500_PER3_BASE 0x80000000
		#define U8500_STM_BASE 0x80100000
		#define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000)

arch/arm/mach-ux500/include/mach/devices.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -25,5 +25,8 @@ extern struct platform_device ux500_i2c3_device;

		extern struct platform_device u8500_i2c0_device;
		extern struct platform_device u8500_i2c4_device;
		extern struct platform_device u8500_dma40_device;

		void dma40_u8500ed_fixup(void);

		#endif

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