Unverified Commit e3354b17 authored Oct 24, 2019 by Alvaro Gamez Machado Committed by Mark Brown Oct 24, 2019

spi: xilinx: add description of new property xlnx,num-transfer-bits

This property is used to set the number of bits per transfer (bits_per_word).

Xilinx' IP core allows either 8, 16 or 32, and is non changeable on runtime,
only when instantiating the core.

Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
Link: https://lore.kernel.org/r/20191024110757.25820-2-alvaro.gamez@hazent.com

Signed-off-by: Mark Brown <broonie@kernel.org>

parent be73e323

Documentation/devicetree/bindings/spi/spi-xilinx.txt

+3 −1

Original line number	Diff line number	Diff line
		@@ -9,6 +9,7 @@ Required properties:

		Optional properties:
		- xlnx,num-ss-bits : Number of chip selects used.
		- xlnx,num-transfer-bits : Number of bits per transfer. This will be 8 if not specified

		Example:
		axi_quad_spi@41e00000 {
		@@ -17,5 +18,6 @@ Example:
		interrupts = <0 31 1>;
		reg = <0x41e00000 0x10000>;
		xlnx,num-ss-bits = <0x1>;
		xlnx,num-transfer-bits = <32>;
		};