arm64: zynqmp: Add operating points (e31b7bb8) · Commits · 戴 / test

arch/arm64/boot/dts/xilinx/zynqmp.dtsi

+29 −0

Original line number	Diff line number	Diff line
		@@ -24,6 +24,7 @@
		compatible = "arm,cortex-a53", "arm,armv8";
		device_type = "cpu";
		enable-method = "psci";
		operating-points-v2 = <&cpu_opp_table>;
		reg = <0x0>;
		cpu-idle-states = <&CPU_SLEEP_0>;
		};
		@@ -33,6 +34,7 @@
		device_type = "cpu";
		enable-method = "psci";
		reg = <0x1>;
		operating-points-v2 = <&cpu_opp_table>;
		cpu-idle-states = <&CPU_SLEEP_0>;
		};

		@@ -41,6 +43,7 @@
		device_type = "cpu";
		enable-method = "psci";
		reg = <0x2>;
		operating-points-v2 = <&cpu_opp_table>;
		cpu-idle-states = <&CPU_SLEEP_0>;
		};

		@@ -49,6 +52,7 @@
		device_type = "cpu";
		enable-method = "psci";
		reg = <0x3>;
		operating-points-v2 = <&cpu_opp_table>;
		cpu-idle-states = <&CPU_SLEEP_0>;
		};

		@@ -66,6 +70,31 @@
		};
		};

		cpu_opp_table: cpu_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		opp00 {
		opp-hz = /bits/ 64 <1199999988>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <500000>;
		};
		opp01 {
		opp-hz = /bits/ 64 <599999994>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <500000>;
		};
		opp02 {
		opp-hz = /bits/ 64 <399999996>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <500000>;
		};
		opp03 {
		opp-hz = /bits/ 64 <299999997>;
		opp-microvolt = <1000000>;
		clock-latency-ns = <500000>;
		};
		};

		pmu {
		compatible = "arm,armv8-pmuv3";
		interrupt-parent = <&gic>;