Commit e30f4192 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc 

Pull ARC port updates from Vineet Gupta:
 "Support for two new platforms based on ARC700:
   - Abilis TB10x SoC [Chritisian/Pierrick]
   - Simulator only System-C Model [Mischa]

  ARC specific MM improvements:
   - Avoid full TLB flush (ASID increment) on munmap (even single page)
   - VIPT Cache Flushing improvements
     + Delayed dcache flush for non-aliasing dcache (big performance boost)
     + icache flush aliasing agnostic (no need to kill all possible aliases)

  Others:
   - Avoid needless rebuild of DTB files for every kernel build
   - Remove builtin cmdline as that is already provided by DeviceTree/bootargs
   - Fixing unaligned access emulation corner case
   - checkpatch fixes [Sachin]
   - Various fixlets [Noam]
   - Minor build failures/cleanups"

* tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (35 commits)
  ARC: [mm] Lazy D-cache flush (non aliasing VIPT)
  ARC: [mm] micro-optimize page size icache invalidate
  ARC: [mm] remove the pessimistic all-alias-invalidate icache helpers
  ARC: [mm] consolidate icache/dcache sync code
  ARC: [mm] optimise icache flush for kernel mappings
  ARC: [mm] optimise icache flush for user mappings
  ARC: [mm] optimize needless full mm TLB flush on munmap
  ARC: Add support for nSIM OSCI System C model
  ARC: [TB10x] Adapt device tree to new compatible string
  ARC: [TB10x] Add support for TB10x platform
  ARC: [TB10x] Device tree of TB100 and TB101 Development Kits
  ARC: Prepare interrupt code for external controllers
  ARC: Allow embedded arc-intc to be properly placed in DT intc hierarchy
  ARC: [cmdline] Don't overwrite u-boot provided bootargs
  ARC: [cmdline] Remove CONFIG_CMDLINE
  ARC: [plat-arcfpga] defconfig update
  ARC: unaligned access emulation broken if callee-reg dest of LD/ST
  ARC: unaligned access emulation error handling consolidation
  ARC: Debug/crash-printing Improvements
  ARC: fix typo with clock speed
  ...
parents b32729b1 eacd0e95

arch/arc/Kconfig

+11 −20
Original line number Diff line number Diff line
@@ -16,8 +16,6 @@ config ARC 
	select GENERIC_FIND_FIRST_BIT

	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP

	select GENERIC_IRQ_SHOW

	select GENERIC_KERNEL_EXECVE

	select GENERIC_KERNEL_THREAD

	select GENERIC_PENDING_IRQ if SMP

	select GENERIC_SMP_IDLE_THREAD

	select HAVE_ARCH_KGDB
@@ -61,9 +59,6 @@ config GENERIC_CALIBRATE_DELAY 
config GENERIC_HWEIGHT

	def_bool y



config BINFMT_ELF

	def_bool y



config STACKTRACE_SUPPORT

	def_bool y

	select STACKTRACE
@@ -82,6 +77,7 @@ menu "ARC Architecture Configuration" 
menu "ARC Platform/SoC/Board"



source "arch/arc/plat-arcfpga/Kconfig"

source "arch/arc/plat-tb10x/Kconfig"

#New platform adds here



endmenu
@@ -134,9 +130,6 @@ if SMP 
config ARC_HAS_COH_CACHES

	def_bool n



config ARC_HAS_COH_LLSC

	def_bool n



config ARC_HAS_COH_RTSC

	def_bool n
@@ -304,6 +297,9 @@ config ARC_FPU_SAVE_RESTORE 
	  based on actual usage of FPU by a task. Thus our implemn does

	  this for all tasks in system.



config ARC_CANT_LLSC

	def_bool n



menuconfig ARC_CPU_REL_4_10

	bool "Enable support for Rel 4.10 features"

	default n
@@ -314,9 +310,7 @@ menuconfig ARC_CPU_REL_4_10 
config ARC_HAS_LLSC

	bool "Insn: LLOCK/SCOND (efficient atomic ops)"

	default y

	depends on ARC_CPU_770

	# if SMP, enable LLSC ONLY if ARC implementation has coherent atomics

	depends on !SMP || ARC_HAS_COH_LLSC

	depends on ARC_CPU_770 && !ARC_CANT_LLSC



config ARC_HAS_SWAPE

	bool "Insn: SWAPE (endian-swap)"
@@ -415,13 +409,6 @@ config ARC_DBG_TLB_MISS_COUNT 
	  Counts number of I and D TLB Misses and exports them via Debugfs

	  The counters can be cleared via Debugfs as well



config CMDLINE

	string "Kernel command line to built-in"

	default "print-fatal-signals=1"

	help

	  The default command line which will be appended to the optional

	  u-boot provided command line (see below)



config CMDLINE_UBOOT

	bool "Support U-boot kernel command line passing"

	default n
@@ -430,8 +417,8 @@ config CMDLINE_UBOOT 
	  command line from the U-boot environment to the Linux kernel then

	  switch this option on.

	  ARC U-boot will setup the cmdline in RAM/flash and set r2 to point

	  to it. kernel startup code will copy the string into cmdline buffer

	  and also append CONFIG_CMDLINE.

	  to it. kernel startup code will append this to DeviceTree

	  /bootargs provided cmdline args.



config ARC_BUILTIN_DTB_NAME

	string "Built in DTB"
@@ -441,6 +428,10 @@ config ARC_BUILTIN_DTB_NAME 


source "kernel/Kconfig.preempt"



menu "Executable file formats"

source "fs/Kconfig.binfmt"

endmenu



endmenu	 # "ARC Architecture Configuration"



source "mm/Kconfig"

arch/arc/Makefile

+11 −4
Original line number Diff line number Diff line
@@ -8,6 +8,10 @@ 


UTS_MACHINE := arc



ifeq ($(CROSS_COMPILE),)

CROSS_COMPILE := arc-elf32-

endif



KBUILD_DEFCONFIG := fpga_defconfig



cflags-y	+= -mA7 -fno-common -pipe -fno-builtin -D__linux__
@@ -87,20 +91,23 @@ core-y += arch/arc/ 
core-y		+= arch/arc/boot/dts/



core-$(CONFIG_ARC_PLAT_FPGA_LEGACY)	+= arch/arc/plat-arcfpga/

core-$(CONFIG_ARC_PLAT_TB10X)		+= arch/arc/plat-tb10x/



drivers-$(CONFIG_OPROFILE)	+= arch/arc/oprofile/



libs-y		+= arch/arc/lib/ $(LIBGCC)



boot		:= arch/arc/boot



#default target for make without any arguements.

KBUILD_IMAGE	:= bootpImage



all:	$(KBUILD_IMAGE)

boot	:= arch/arc/boot



bootpImage: vmlinux



uImage: vmlinux

boot_targets += uImage uImage.bin uImage.gz



$(boot_targets): vmlinux

	$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@



%.dtb %.dtb.S %.dtb.o: scripts

arch/arc/boot/Makefile

+14 −5
Original line number Diff line number Diff line
@@ -3,7 +3,6 @@ targets := vmlinux.bin vmlinux.bin.gz uImage 
# uImage build relies on mkimage being availble on your host for ARC target

# You will need to build u-boot for ARC, rename mkimage to arc-elf32-mkimage

# and make sure it's reacable from your PATH

MKIMAGE := $(srctree)/scripts/mkuboot.sh



OBJCOPYFLAGS= -O binary -R .note -R .note.gnu.build-id -R .comment -S
@@ -12,7 +11,12 @@ LINUX_START_TEXT = $$(readelf -h vmlinux | \ 


UIMAGE_LOADADDR    = $(CONFIG_LINUX_LINK_BASE)

UIMAGE_ENTRYADDR   = $(LINUX_START_TEXT)

UIMAGE_COMPRESSION = gzip



suffix-y := bin

suffix-$(CONFIG_KERNEL_GZIP)	:= gz



targets += uImage uImage.bin uImage.gz

extra-y += vmlinux.bin vmlinux.bin.gz



$(obj)/vmlinux.bin: vmlinux FORCE

	$(call if_changed,objcopy)
@@ -20,7 +24,12 @@ $(obj)/vmlinux.bin: vmlinux FORCE 
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE

	$(call if_changed,gzip)



$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE

	$(call if_changed,uimage)

$(obj)/uImage.bin: $(obj)/vmlinux.bin FORCE

	$(call if_changed,uimage,none)



$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz FORCE

	$(call if_changed,uimage,gzip)



PHONY += FORCE
 
$(obj)/uImage: $(obj)/uImage.$(suffix-y)

	@ln -sf $(notdir $<) $@

	@echo '  Image $@ is ready'

arch/arc/boot/dts/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ endif 
obj-y   += $(builtindtb-y).dtb.o

targets += $(builtindtb-y).dtb



.SECONDARY: $(obj)/$(builtindtb-y).dtb.S



dtbs:  $(addprefix  $(obj)/, $(builtindtb-y).dtb)



clean-files := *.dtb
 
clean-files := *.dtb  *.dtb.S

arch/arc/boot/dts/abilis_tb100.dtsi

0 → 100644
+340 −0
Original line number Diff line number Diff line 
/*

 * Abilis Systems TB100 SOC device tree

 *

 * Copyright (C) Abilis Systems 2013

 *

 * Author: Christian Ruppert <christian.ruppert@abilis.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA

 */



/include/ "abilis_tb10x.dtsi"



/* interrupt specifiers

 * --------------------

 * 0: rising, 1: low, 2: high, 3: falling,

 */



/ {

	clock-frequency		= <500000000>;	/* 500 MHZ */



	soc100 {

		bus-frequency	= <166666666>;



		pll0: oscillator {

			clock-frequency  = <1000000000>;

		};

		cpu_clk: clkdiv_cpu {

			clock-mult = <1>;

			clock-div = <2>;

		};

		ahb_clk: clkdiv_ahb {

			clock-mult = <1>;

			clock-div = <6>;

		};



		iomux: iomux@FF10601c {

			/* Port 1 */

			pctl_tsin_s0: pctl-tsin-s0 {   /* Serial TS-in 0 */

				pingrp = "mis0_pins";

			};

			pctl_tsin_s1: pctl-tsin-s1 {   /* Serial TS-in 1 */

				pingrp = "mis1_pins";

			};

			pctl_gpio_a: pctl-gpio-a {     /* GPIO bank A */

				pingrp = "gpioa_pins";

			};

			pctl_tsin_p1: pctl-tsin-p1 {   /* Parallel TS-in 1 */

				pingrp = "mip1_pins";

			};

			/* Port 2 */

			pctl_tsin_s2: pctl-tsin-s2 {   /* Serial TS-in 2 */

				pingrp = "mis2_pins";

			};

			pctl_tsin_s3: pctl-tsin-s3 {   /* Serial TS-in 3 */

				pingrp = "mis3_pins";

			};

			pctl_gpio_c: pctl-gpio-c {     /* GPIO bank C */

				pingrp = "gpioc_pins";

			};

			pctl_tsin_p3: pctl-tsin-p3 {   /* Parallel TS-in 3 */

				pingrp = "mip3_pins";

			};

			/* Port 3 */

			pctl_tsin_s4: pctl-tsin-s4 {   /* Serial TS-in 4 */

				pingrp = "mis4_pins";

			};

			pctl_tsin_s5: pctl-tsin-s5 {   /* Serial TS-in 5 */

				pingrp = "mis5_pins";

			};

			pctl_gpio_e: pctl-gpio-e {     /* GPIO bank E */

				pingrp = "gpioe_pins";

			};

			pctl_tsin_p5: pctl-tsin-p5 {   /* Parallel TS-in 5 */

				pingrp = "mip5_pins";

			};

			/* Port 4 */

			pctl_tsin_s6: pctl-tsin-s6 {   /* Serial TS-in 6 */

				pingrp = "mis6_pins";

			};

			pctl_tsin_s7: pctl-tsin-s7 {   /* Serial TS-in 7 */

				pingrp = "mis7_pins";

			};

			pctl_gpio_g: pctl-gpio-g {     /* GPIO bank G */

				pingrp = "gpiog_pins";

			};

			pctl_tsin_p7: pctl-tsin-p7 {   /* Parallel TS-in 7 */

				pingrp = "mip7_pins";

			};

			/* Port 5 */

			pctl_gpio_j: pctl-gpio-j {     /* GPIO bank J */

				pingrp = "gpioj_pins";

			};

			pctl_gpio_k: pctl-gpio-k {     /* GPIO bank K */

				pingrp = "gpiok_pins";

			};

			pctl_ciplus: pctl-ciplus {     /* CI+ interface */

				pingrp = "ciplus_pins";

			};

			pctl_mcard: pctl-mcard {       /* M-Card interface */

				pingrp = "mcard_pins";

			};

			/* Port 6 */

			pctl_tsout_p: pctl-tsout-p {   /* Parallel TS-out */

				pingrp = "mop_pins";

			};

			pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */

				pingrp = "mos0_pins";

			};

			pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */

				pingrp = "mos1_pins";

			};

			pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */

				pingrp = "mos2_pins";

			};

			pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */

				pingrp = "mos3_pins";

			};

			/* Port 7 */

			pctl_uart0: pctl-uart0 {       /* UART 0 */

				pingrp = "uart0_pins";

			};

			pctl_uart1: pctl-uart1 {       /* UART 1 */

				pingrp = "uart1_pins";

			};

			pctl_gpio_l: pctl-gpio-l {     /* GPIO bank L */

				pingrp = "gpiol_pins";

			};

			pctl_gpio_m: pctl-gpio-m {     /* GPIO bank M */

				pingrp = "gpiom_pins";

			};

			/* Port 8 */

			pctl_spi3: pctl-spi3 {

				pingrp = "spi3_pins";

			};

			/* Port 9 */

			pctl_spi1: pctl-spi1 {

				pingrp = "spi1_pins";

			};

			pctl_gpio_n: pctl-gpio-n {

				pingrp = "gpion_pins";

			};

			/* Unmuxed GPIOs */

			pctl_gpio_b: pctl-gpio-b {

				pingrp = "gpiob_pins";

			};

			pctl_gpio_d: pctl-gpio-d {

				pingrp = "gpiod_pins";

			};

			pctl_gpio_f: pctl-gpio-f {

				pingrp = "gpiof_pins";

			};

			pctl_gpio_h: pctl-gpio-h {

				pingrp = "gpioh_pins";

			};

			pctl_gpio_i: pctl-gpio-i {

				pingrp = "gpioi_pins";

			};

		};



		gpioa: gpio@FF140000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF140000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <0>;

			gpio-pins = <&pctl_gpio_a>;

		};

		gpiob: gpio@FF141000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF141000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <3>;

			gpio-pins = <&pctl_gpio_b>;

		};

		gpioc: gpio@FF142000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF142000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <5>;

			gpio-pins = <&pctl_gpio_c>;

		};

		gpiod: gpio@FF143000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF143000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <8>;

			gpio-pins = <&pctl_gpio_d>;

		};

		gpioe: gpio@FF144000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF144000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <10>;

			gpio-pins = <&pctl_gpio_e>;

		};

		gpiof: gpio@FF145000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF145000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <13>;

			gpio-pins = <&pctl_gpio_f>;

		};

		gpiog: gpio@FF146000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF146000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <15>;

			gpio-pins = <&pctl_gpio_g>;

		};

		gpioh: gpio@FF147000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF147000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <18>;

			gpio-pins = <&pctl_gpio_h>;

		};

		gpioi: gpio@FF148000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF148000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <20>;

			gpio-pins = <&pctl_gpio_i>;

		};

		gpioj: gpio@FF149000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF149000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <32>;

			gpio-pins = <&pctl_gpio_j>;

		};

		gpiok: gpio@FF14a000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF14A000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <64>;

			gpio-pins = <&pctl_gpio_k>;

		};

		gpiol: gpio@FF14b000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF14B000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <86>;

			gpio-pins = <&pctl_gpio_l>;

		};

		gpiom: gpio@FF14c000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF14C000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <90>;

			gpio-pins = <&pctl_gpio_m>;

		};

		gpion: gpio@FF14d000 {

			compatible = "abilis,tb10x-gpio";

			interrupt-controller;

			#interrupt-cells = <1>;

			interrupt-parent = <&tb10x_ictl>;

			interrupts = <27 1>;

			reg = <0xFF14D000 0x1000>;

			gpio-controller;

			#gpio-cells = <1>;

			gpio-base  = <94>;

			gpio-pins = <&pctl_gpio_n>;

		};

	};

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE