Commit e30a7d62 authored Jan 07, 2020 by Sean Christopherson Committed by Paolo Bonzini Jan 21, 2020

KVM: x86/mmu: Apply max PA check for MMIO sptes to 32-bit KVM



Remove the bogus 64-bit only condition from the check that disables MMIO
spte optimization when the system supports the max PA, i.e. doesn't have
any reserved PA bits.  32-bit KVM always uses PAE paging for the shadow
MMU, and per Intel's SDM:

  PAE paging translates 32-bit linear addresses to 52-bit physical
  addresses.

The kernel's restrictions on max physical addresses are limits on how
much memory the kernel can reasonably use, not what physical addresses
are supported by hardware.

Fixes: ce88decf ("KVM: MMU: mmio page fault support")
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

parent a4d956b9

arch/x86/kvm/mmu/mmu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -6193,7 +6193,7 @@ static void kvm_set_mmio_spte_mask(void)
		* If reserved bit is not supported, clear the present bit to disable
		* mmio page fault.
		*/
		if (IS_ENABLED(CONFIG_X86_64) && shadow_phys_bits == 52)
		if (shadow_phys_bits == 52)
		mask &= ~1ull;

		kvm_mmu_set_mmio_spte_mask(mask, mask, ACC_WRITE_MASK \| ACC_USER_MASK);

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