Commit e2ac9628 authored by Hariprasad Shenai's avatar Hariprasad Shenai Committed by David S. Miller
Browse files

cxgb4: Cleanup macros so they follow the same style and look consistent, part 2 



Various patches have ended up changing the style of the symbolic macros/register
defines to different style.

As a result, the current kernel.org files are a mix of different macro styles.
Since this macro/register defines is used by different drivers a
few patch series have ended up adding duplicate macro/register define entries
with different styles. This makes these register define/macro files a complete
mess and we want to make them clean and consistent. This patch cleans up a part
of it.

Signed-off-by: default avatarHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6559a7e8

drivers/infiniband/hw/cxgb4/cm.c

+28 −28
Original line number Diff line number Diff line
@@ -472,10 +472,10 @@ static void send_flowc(struct c4iw_ep *ep, struct sk_buff *skb) 
	skb = get_skb(skb, flowclen, GFP_KERNEL);

	flowc = (struct fw_flowc_wr *)__skb_put(skb, flowclen);



	flowc->op_to_nparams = cpu_to_be32(FW_WR_OP(FW_FLOWC_WR) |

					   FW_FLOWC_WR_NPARAMS(8));

	flowc->flowid_len16 = cpu_to_be32(FW_WR_LEN16(DIV_ROUND_UP(flowclen,

					  16)) | FW_WR_FLOWID(ep->hwtid));

	flowc->op_to_nparams = cpu_to_be32(FW_WR_OP_V(FW_FLOWC_WR) |

					   FW_FLOWC_WR_NPARAMS_V(8));

	flowc->flowid_len16 = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(flowclen,

					  16)) | FW_WR_FLOWID_V(ep->hwtid));



	flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN;

	flowc->mnemval[0].val = cpu_to_be32(FW_PFVF_CMD_PFN
@@ -803,16 +803,16 @@ static void send_mpa_req(struct c4iw_ep *ep, struct sk_buff *skb, 
	req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen);

	memset(req, 0, wrlen);

	req->op_to_immdlen = cpu_to_be32(

		FW_WR_OP(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL(1) |

		FW_WR_IMMDLEN(mpalen));

		FW_WR_OP_V(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL_F |

		FW_WR_IMMDLEN_V(mpalen));

	req->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(ep->hwtid) |

		FW_WR_LEN16(wrlen >> 4));

		FW_WR_FLOWID_V(ep->hwtid) |

		FW_WR_LEN16_V(wrlen >> 4));

	req->plen = cpu_to_be32(mpalen);

	req->tunnel_to_proxy = cpu_to_be32(

		FW_OFLD_TX_DATA_WR_FLUSH(1) |

		FW_OFLD_TX_DATA_WR_SHOVE(1));

		FW_OFLD_TX_DATA_WR_FLUSH_F |

		FW_OFLD_TX_DATA_WR_SHOVE_F);



	mpa = (struct mpa_message *)(req + 1);

	memcpy(mpa->key, MPA_KEY_REQ, sizeof(mpa->key));
@@ -897,16 +897,16 @@ static int send_mpa_reject(struct c4iw_ep *ep, const void *pdata, u8 plen) 
	req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen);

	memset(req, 0, wrlen);

	req->op_to_immdlen = cpu_to_be32(

		FW_WR_OP(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL(1) |

		FW_WR_IMMDLEN(mpalen));

		FW_WR_OP_V(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL_F |

		FW_WR_IMMDLEN_V(mpalen));

	req->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(ep->hwtid) |

		FW_WR_LEN16(wrlen >> 4));

		FW_WR_FLOWID_V(ep->hwtid) |

		FW_WR_LEN16_V(wrlen >> 4));

	req->plen = cpu_to_be32(mpalen);

	req->tunnel_to_proxy = cpu_to_be32(

		FW_OFLD_TX_DATA_WR_FLUSH(1) |

		FW_OFLD_TX_DATA_WR_SHOVE(1));

		FW_OFLD_TX_DATA_WR_FLUSH_F |

		FW_OFLD_TX_DATA_WR_SHOVE_F);



	mpa = (struct mpa_message *)(req + 1);

	memset(mpa, 0, sizeof(*mpa));
@@ -977,16 +977,16 @@ static int send_mpa_reply(struct c4iw_ep *ep, const void *pdata, u8 plen) 
	req = (struct fw_ofld_tx_data_wr *) skb_put(skb, wrlen);

	memset(req, 0, wrlen);

	req->op_to_immdlen = cpu_to_be32(

		FW_WR_OP(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL(1) |

		FW_WR_IMMDLEN(mpalen));

		FW_WR_OP_V(FW_OFLD_TX_DATA_WR) |

		FW_WR_COMPL_F |

		FW_WR_IMMDLEN_V(mpalen));

	req->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(ep->hwtid) |

		FW_WR_LEN16(wrlen >> 4));

		FW_WR_FLOWID_V(ep->hwtid) |

		FW_WR_LEN16_V(wrlen >> 4));

	req->plen = cpu_to_be32(mpalen);

	req->tunnel_to_proxy = cpu_to_be32(

		FW_OFLD_TX_DATA_WR_FLUSH(1) |

		FW_OFLD_TX_DATA_WR_SHOVE(1));

		FW_OFLD_TX_DATA_WR_FLUSH_F |

		FW_OFLD_TX_DATA_WR_SHOVE_F);



	mpa = (struct mpa_message *)(req + 1);

	memset(mpa, 0, sizeof(*mpa));
@@ -1751,7 +1751,7 @@ static void send_fw_act_open_req(struct c4iw_ep *ep, unsigned int atid) 
	req = (struct fw_ofld_connection_wr *)__skb_put(skb, sizeof(*req));

	memset(req, 0, sizeof(*req));

	req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR));

	req->len16_pkd = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*req), 16)));

	req->len16_pkd = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*req), 16)));

	req->le.filter = cpu_to_be32(cxgb4_select_ntuple(

				     ep->com.dev->rdev.lldi.ports[0],

				     ep->l2t));
@@ -3537,8 +3537,8 @@ static void send_fw_pass_open_req(struct c4iw_dev *dev, struct sk_buff *skb, 
	req_skb = alloc_skb(sizeof(struct fw_ofld_connection_wr), GFP_KERNEL);

	req = (struct fw_ofld_connection_wr *)__skb_put(req_skb, sizeof(*req));

	memset(req, 0, sizeof(*req));

	req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR) | FW_WR_COMPL(1));

	req->len16_pkd = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*req), 16)));

	req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR) | FW_WR_COMPL_F);

	req->len16_pkd = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*req), 16)));

	req->le.version_cpl = htonl(F_FW_OFLD_CONNECTION_WR_CPL);

	req->le.filter = (__force __be32) filter;

	req->le.lport = lport;

drivers/infiniband/hw/cxgb4/cq.c

+4 −4
Original line number Diff line number Diff line
@@ -51,9 +51,9 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, 
	res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len);

	memset(res_wr, 0, wr_len);

	res_wr->op_nres = cpu_to_be32(

			FW_WR_OP(FW_RI_RES_WR) |

			FW_WR_OP_V(FW_RI_RES_WR) |

			V_FW_RI_RES_WR_NRES(1) |

			FW_WR_COMPL(1));

			FW_WR_COMPL_F);

	res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16));

	res_wr->cookie = (unsigned long) &wr_wait;

	res = res_wr->res;
@@ -121,9 +121,9 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, 
	res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len);

	memset(res_wr, 0, wr_len);

	res_wr->op_nres = cpu_to_be32(

			FW_WR_OP(FW_RI_RES_WR) |

			FW_WR_OP_V(FW_RI_RES_WR) |

			V_FW_RI_RES_WR_NRES(1) |

			FW_WR_COMPL(1));

			FW_WR_COMPL_F);

	res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16));

	res_wr->cookie = (unsigned long) &wr_wait;

	res = res_wr->res;

drivers/infiniband/hw/cxgb4/mem.c

+7 −7
Original line number Diff line number Diff line
@@ -74,10 +74,10 @@ static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr, 
	req = (struct ulp_mem_io *)__skb_put(skb, wr_len);

	memset(req, 0, wr_len);

	INIT_ULPTX_WR(req, wr_len, 0, 0);

	req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) |

			(wait ? FW_WR_COMPL(1) : 0));

	req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) |

			(wait ? FW_WR_COMPL_F : 0));

	req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L;

	req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16)));

	req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16)));

	req->cmd = cpu_to_be32(ULPTX_CMD(ULP_TX_MEM_WRITE));

	req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1));

	req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN(len>>5));
@@ -135,13 +135,13 @@ static int _c4iw_write_mem_inline(struct c4iw_rdev *rdev, u32 addr, u32 len, 
		INIT_ULPTX_WR(req, wr_len, 0, 0);



		if (i == (num_wqe-1)) {

			req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) |

						    FW_WR_COMPL(1));

			req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) |

						    FW_WR_COMPL_F);

			req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait;

		} else

			req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR));

			req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR));

		req->wr.wr_mid = cpu_to_be32(

				       FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16)));

				       FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16)));



		req->cmd = cmd;

		req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN(

drivers/infiniband/hw/cxgb4/qp.c

+13 −13
Original line number Diff line number Diff line
@@ -271,9 +271,9 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, 
	res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len);

	memset(res_wr, 0, wr_len);

	res_wr->op_nres = cpu_to_be32(

			FW_WR_OP(FW_RI_RES_WR) |

			FW_WR_OP_V(FW_RI_RES_WR) |

			V_FW_RI_RES_WR_NRES(2) |

			FW_WR_COMPL(1));

			FW_WR_COMPL_F);

	res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16));

	res_wr->cookie = (unsigned long) &wr_wait;

	res = res_wr->res;
@@ -1082,10 +1082,10 @@ static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, 


	wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe));

	memset(wqe, 0, sizeof *wqe);

	wqe->op_compl = cpu_to_be32(FW_WR_OP(FW_RI_INIT_WR));

	wqe->op_compl = cpu_to_be32(FW_WR_OP_V(FW_RI_INIT_WR));

	wqe->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(qhp->ep->hwtid) |

		FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16)));

		FW_WR_FLOWID_V(qhp->ep->hwtid) |

		FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16)));



	wqe->u.terminate.type = FW_RI_TYPE_TERMINATE;

	wqe->u.terminate.immdlen = cpu_to_be32(sizeof *term);
@@ -1204,11 +1204,11 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, 
	wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe));

	memset(wqe, 0, sizeof *wqe);

	wqe->op_compl = cpu_to_be32(

		FW_WR_OP(FW_RI_INIT_WR) |

		FW_WR_COMPL(1));

		FW_WR_OP_V(FW_RI_INIT_WR) |

		FW_WR_COMPL_F);

	wqe->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(ep->hwtid) |

		FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16)));

		FW_WR_FLOWID_V(ep->hwtid) |

		FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16)));

	wqe->cookie = (unsigned long) &ep->com.wr_wait;



	wqe->u.fini.type = FW_RI_TYPE_FINI;
@@ -1273,11 +1273,11 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) 
	wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe));

	memset(wqe, 0, sizeof *wqe);

	wqe->op_compl = cpu_to_be32(

		FW_WR_OP(FW_RI_INIT_WR) |

		FW_WR_COMPL(1));

		FW_WR_OP_V(FW_RI_INIT_WR) |

		FW_WR_COMPL_F);

	wqe->flowid_len16 = cpu_to_be32(

		FW_WR_FLOWID(qhp->ep->hwtid) |

		FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16)));

		FW_WR_FLOWID_V(qhp->ep->hwtid) |

		FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16)));



	wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait;

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

+1 −1
Original line number Diff line number Diff line
@@ -354,7 +354,7 @@ struct link_config { 
	unsigned char  link_ok;          /* link up? */

};



#define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16)

#define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)



enum {

	MAX_ETH_QSETS = 32,           /* # of Ethernet Tx/Rx queue sets */

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