net/mlx5: FPGA, Add basic support for Innova (e29341fb) · Commits · 戴 / test

MAINTAINERS

+10 −0

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		@@ -8304,6 +8304,16 @@ W: http://www.mellanox.com
		Q: http://patchwork.ozlabs.org/project/netdev/list/
		F: drivers/net/ethernet/mellanox/mlx5/core/en_*

		MELLANOX ETHERNET INNOVA DRIVER
		M: Ilan Tayari <ilant@mellanox.com>
		R: Boris Pismenny <borisp@mellanox.com>
		L: netdev@vger.kernel.org
		S: Supported
		W: http://www.mellanox.com
		Q: http://patchwork.ozlabs.org/project/netdev/list/
		F: drivers/net/ethernet/mellanox/mlx5/core/fpga/*
		F: include/linux/mlx5/mlx5_ifc_fpga.h

		MELLANOX ETHERNET SWITCH DRIVERS
		M: Jiri Pirko <jiri@mellanox.com>
		M: Ido Schimmel <idosch@mellanox.com>

drivers/net/ethernet/mellanox/mlx5/core/Kconfig

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		@@ -11,6 +11,16 @@ config MLX5_CORE
		Core driver for low level functionality of the ConnectX-4 and
		Connect-IB cards by Mellanox Technologies.

		config MLX5_FPGA
		bool "Mellanox Technologies Innova support"
		depends on MLX5_CORE
		---help---
		Build support for the Innova family of network cards by Mellanox
		Technologies. Innova network cards are comprised of a ConnectX chip
		and an FPGA chip on one board. If you select this option, the
		mlx5_core driver will include the Innova FPGA core and allow building
		sandbox-specific client drivers.

		config MLX5_CORE_EN
		bool "Mellanox Technologies ConnectX-4 Ethernet support"
		depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+3 −0

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		obj-$(CONFIG_MLX5_CORE) += mlx5_core.o
		subdir-ccflags-y += -I$(src)

		mlx5_core-y := main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \
		health.o mcg.o cq.o srq.o alloc.o qp.o port.o mr.o pd.o \
		mad.o transobj.o vport.o sriov.o fs_cmd.o fs_core.o \
		fs_counters.o rl.o lag.o dev.o

		mlx5_core-$(CONFIG_MLX5_FPGA) += fpga/cmd.o fpga/core.o

		mlx5_core-$(CONFIG_MLX5_CORE_EN) += wq.o eswitch.o eswitch_offloads.o \
		en_main.o en_common.o en_fs.o en_ethtool.o en_tx.o \
		en_rx.o en_rx_am.o en_txrx.o en_clock.o vxlan.o \

drivers/net/ethernet/mellanox/mlx5/core/eq.c

+11 −0

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		@@ -35,6 +35,7 @@
		#include <linux/mlx5/driver.h>
		#include <linux/mlx5/cmd.h>
		#include "mlx5_core.h"
		#include "fpga/core.h"
		#ifdef CONFIG_MLX5_CORE_EN
		#include "eswitch.h"
		#endif
		@@ -156,6 +157,8 @@ static const char *eqe_type_str(u8 type)
		return "MLX5_EVENT_TYPE_PAGE_FAULT";
		case MLX5_EVENT_TYPE_PPS_EVENT:
		return "MLX5_EVENT_TYPE_PPS_EVENT";
		case MLX5_EVENT_TYPE_FPGA_ERROR:
		return "MLX5_EVENT_TYPE_FPGA_ERROR";
		default:
		return "Unrecognized event";
		}
		@@ -476,6 +479,11 @@ static irqreturn_t mlx5_eq_int(int irq, void *eq_ptr)
		if (dev->event)
		dev->event(dev, MLX5_DEV_EVENT_PPS, (unsigned long)eqe);
		break;

		case MLX5_EVENT_TYPE_FPGA_ERROR:
		mlx5_fpga_event(dev, eqe->type, &eqe->data.raw);
		break;

		default:
		mlx5_core_warn(dev, "Unhandled event 0x%x on EQ 0x%x\n",
		eqe->type, eq->eqn);
		@@ -693,6 +701,9 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev)
		if (MLX5_CAP_GEN(dev, pps))
		async_event_mask \|= (1ull << MLX5_EVENT_TYPE_PPS_EVENT);

		if (MLX5_CAP_GEN(dev, fpga))
		async_event_mask \|= (1ull << MLX5_EVENT_TYPE_FPGA_ERROR);

		err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD,
		MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD,
		"mlx5_cmd_eq", MLX5_EQ_TYPE_ASYNC);

drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c

0 → 100644

+64 −0

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		/*
		* Copyright (c) 2017, Mellanox Technologies. All rights reserved.
		*
		* This software is available to you under a choice of one of two
		* licenses. You may choose to be licensed under the terms of the GNU
		* General Public License (GPL) Version 2, available from the file
		* COPYING in the main directory of this source tree, or the
		* OpenIB.org BSD license below:
		*
		* Redistribution and use in source and binary forms, with or
		* without modification, are permitted provided that the following
		* conditions are met:
		*
		* - Redistributions of source code must retain the above
		* copyright notice, this list of conditions and the following
		* disclaimer.
		*
		* - Redistributions in binary form must reproduce the above
		* copyright notice, this list of conditions and the following
		* disclaimer in the documentation and/or other materials
		* provided with the distribution.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
		* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
		* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
		* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
		* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		* SOFTWARE.
		*/

		#include <linux/etherdevice.h>
		#include <linux/mlx5/cmd.h>
		#include <linux/mlx5/driver.h>

		#include "mlx5_core.h"
		#include "fpga/cmd.h"

		int mlx5_fpga_caps(struct mlx5_core_dev dev, u32 caps)
		{
		u32 in[MLX5_ST_SZ_DW(fpga_cap)] = {0};

		return mlx5_core_access_reg(dev, in, sizeof(in), caps,
		MLX5_ST_SZ_BYTES(fpga_cap),
		MLX5_REG_FPGA_CAP, 0, 0);
		}

		int mlx5_fpga_query(struct mlx5_core_dev dev, struct mlx5_fpga_query query)
		{
		u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
		u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
		int err;

		err = mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out),
		MLX5_REG_FPGA_CTRL, 0, false);
		if (err)
		return err;

		query->status = MLX5_GET(fpga_ctrl, out, status);
		query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin);
		query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper);
		return 0;
		}

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