Commit e2377c81 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: ux500: move AB8500 PWM out settings to device tree 



This moves the muxing and biasing of the AB8500 PWM output pins
over to the device tree for affected platforms.

Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent fd385b33

arch/arm/boot/dts/ste-href-ab8500.dtsi

+17 −1
Original line number Diff line number Diff line
@@ -32,7 +32,8 @@ 
						    <&gpio42_default_mode>,

						    <&gpio26_default_mode>,

						    <&gpio35_default_mode>,

						    <&ycbcr_default_mode>;

						    <&ycbcr_default_mode>,

						    <&pwm_default_mode>;



					/*

					 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
@@ -267,6 +268,21 @@ 
							};

						};

					};

					/* This sets up the PWM pins 14 and 15 */

					pwm {

						pwm_default_mode: pwm_default {

							default_mux {

								ste,function = "pwmout";

								ste,pins = "pwmout1_d_1", "pwmout2_d_1";

							};

							default_cfg {

								ste,pins = "GPIO14_F14",

									 "GPIO15_B17";

								input-enable;

								bias-pull-down;

							};

						};

					};

				};

			};

		};

arch/arm/mach-ux500/board-mop500-pins.c

+0 −10
Original line number Diff line number Diff line
@@ -56,16 +56,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = { 
	AB8500_MUX_STATE("gpio3_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),

	AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),



	/*

	 * pins 14,15 are muxed in PWM1 and PWM2

	 * configured in INPUT PULL DOWN

	 */

	AB8500_MUX_HOG("pwmout1_d_1", "pwmout"),

	AB8500_PIN_HOG("GPIO14_F14", in_pd),



	AB8500_MUX_HOG("pwmout2_d_1", "pwmout"),

	AB8500_PIN_HOG("GPIO15_B17", in_pd),



	/*

	 * pins 17,18,19 and 20 are muxed in AUDIO interface 1

	 * configured in INPUT PULL DOWN

CRA Git | Maintained and supported by SUSTech CRA and CCSE