Commit e22a2205 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-fixes-5.9' of... 

Merge tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-linus

Vinod writes:

phy: fixes for 5.9

*) platform_no_drv_owner.cocci and return value check qcom ipq806x-usb driver
*) correcting register programming for ipq8074 phy
*) disable PHY charger detect for omap-usb2-phy

* tag 'phy-fixes-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: omap-usb2-phy: disable PHY charger detect
  phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init
  phy: qualcomm: fix return value check in qcom_ipq806x_usb_phy_probe()
  phy: qualcomm: fix platform_no_drv_owner.cocci warnings
parents 51fc07d9 ad7a7aca

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

+2 −3
Original line number Diff line number Diff line
@@ -505,9 +505,9 @@ static int qcom_ipq806x_usb_phy_probe(struct platform_device *pdev) 
	size = resource_size(res);

	phy_dwc3->base = devm_ioremap(phy_dwc3->dev, res->start, size);



	if (IS_ERR(phy_dwc3->base)) {

	if (!phy_dwc3->base) {

		dev_err(phy_dwc3->dev, "failed to map reg\n");

		return PTR_ERR(phy_dwc3->base);

		return -ENOMEM;

	}



	phy_dwc3->ref_clk = devm_clk_get(phy_dwc3->dev, "ref");
@@ -557,7 +557,6 @@ static struct platform_driver qcom_ipq806x_usb_phy_driver = { 
	.probe		= qcom_ipq806x_usb_phy_probe,

	.driver		= {

		.name	= "qcom-ipq806x-usb-phy",

		.owner	= THIS_MODULE,

		.of_match_table = qcom_ipq806x_usb_phy_table,

	},

};

drivers/phy/qualcomm/phy-qcom-qmp.c

+9 −7
Original line number Diff line number Diff line
@@ -604,8 +604,8 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = { 
	QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0xf),

	QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_EN, 0x1),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x0),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0x1f),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0xff),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x1f),

	QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x6),

	QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0xf),

	QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x0),
@@ -631,7 +631,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = { 
	QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x0),

	QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80),

	QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CTRL_BY_PSM, 0x1),

	QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_CTRL, 0xa),

	QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x1),

	QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x31),

	QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x1),
@@ -640,7 +639,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_serdes_tbl[] = { 
	QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0x2f),

	QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x19),

	QMP_PHY_INIT_CFG(QSERDES_COM_CLK_EP_DIV, 0x19),

	QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x7),

};



static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] = {
@@ -648,6 +646,8 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_tx_tbl[] = { 
	QMP_PHY_INIT_CFG(QSERDES_TX_LANE_MODE, 0x6),

	QMP_PHY_INIT_CFG(QSERDES_TX_RES_CODE_LANE_OFFSET, 0x2),

	QMP_PHY_INIT_CFG(QSERDES_TX_RCV_DETECT_LVL_2, 0x12),

	QMP_PHY_INIT_CFG(QSERDES_TX_EMP_POST1_LVL, 0x36),

	QMP_PHY_INIT_CFG(QSERDES_TX_SLEW_CNTL, 0x0a),

};



static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] = {
@@ -658,7 +658,6 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_rx_tbl[] = { 
	QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4, 0xdb),

	QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x4b),

	QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_GAIN, 0x4),

	QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_SO_GAIN_HALF, 0x4),

};



static const struct qmp_phy_init_tbl ipq8074_pcie_pcs_tbl[] = {
@@ -2046,6 +2045,9 @@ static const struct qmp_phy_cfg msm8996_usb3phy_cfg = { 
	.pwrdn_ctrl		= SW_PWRDN,

};



static const char * const ipq8074_pciephy_clk_l[] = {

	"aux", "cfg_ahb",

};

/* list of resets */

static const char * const ipq8074_pciephy_reset_l[] = {

	"phy", "common",
@@ -2063,8 +2065,8 @@ static const struct qmp_phy_cfg ipq8074_pciephy_cfg = { 
	.rx_tbl_num		= ARRAY_SIZE(ipq8074_pcie_rx_tbl),

	.pcs_tbl		= ipq8074_pcie_pcs_tbl,

	.pcs_tbl_num		= ARRAY_SIZE(ipq8074_pcie_pcs_tbl),

	.clk_list		= NULL,

	.num_clks		= 0,

	.clk_list		= ipq8074_pciephy_clk_l,

	.num_clks		= ARRAY_SIZE(ipq8074_pciephy_clk_l),

	.reset_list		= ipq8074_pciephy_reset_l,

	.num_resets		= ARRAY_SIZE(ipq8074_pciephy_reset_l),

	.vreg_list		= NULL,

drivers/phy/qualcomm/phy-qcom-qmp.h

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,8 @@ 
#define QSERDES_COM_CORECLK_DIV_MODE1			0x1bc



/* Only for QMP V2 PHY - TX registers */

#define QSERDES_TX_EMP_POST1_LVL			0x018

#define QSERDES_TX_SLEW_CNTL				0x040

#define QSERDES_TX_RES_CODE_LANE_OFFSET			0x054

#define QSERDES_TX_DEBUG_BUS_SEL			0x064

#define QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN	0x068

drivers/phy/ti/phy-omap-usb2.c

+40 −7
Original line number Diff line number Diff line
@@ -22,10 +22,15 @@ 
#include <linux/mfd/syscon.h>

#include <linux/regmap.h>

#include <linux/of_platform.h>

#include <linux/sys_soc.h>



#define USB2PHY_ANA_CONFIG1		0x4c

#define USB2PHY_DISCON_BYP_LATCH	BIT(31)



#define USB2PHY_CHRG_DET			0x14

#define USB2PHY_CHRG_DET_USE_CHG_DET_REG	BIT(29)

#define USB2PHY_CHRG_DET_DIS_CHG_DET		BIT(28)



/* SoC Specific USB2_OTG register definitions */

#define AM654_USB2_OTG_PD		BIT(8)

#define AM654_USB2_VBUS_DET_EN		BIT(5)
@@ -43,6 +48,7 @@ 
#define OMAP_USB2_HAS_START_SRP			BIT(0)

#define OMAP_USB2_HAS_SET_VBUS			BIT(1)

#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT	BIT(2)

#define OMAP_USB2_DISABLE_CHRG_DET		BIT(3)



struct omap_usb {

	struct usb_phy		phy;
@@ -236,6 +242,13 @@ static int omap_usb_init(struct phy *x) 
		omap_usb_writel(phy->phy_base, USB2PHY_ANA_CONFIG1, val);

	}



	if (phy->flags & OMAP_USB2_DISABLE_CHRG_DET) {

		val = omap_usb_readl(phy->phy_base, USB2PHY_CHRG_DET);

		val |= USB2PHY_CHRG_DET_USE_CHG_DET_REG |

		       USB2PHY_CHRG_DET_DIS_CHG_DET;

		omap_usb_writel(phy->phy_base, USB2PHY_CHRG_DET, val);

	}



	return 0;

}
@@ -329,6 +342,26 @@ static const struct of_device_id omap_usb2_id_table[] = { 
};

MODULE_DEVICE_TABLE(of, omap_usb2_id_table);



static void omap_usb2_init_errata(struct omap_usb *phy)

{

	static const struct soc_device_attribute am65x_sr10_soc_devices[] = {

		{ .family = "AM65X", .revision = "SR1.0" },

		{ /* sentinel */ }

	};



	/*

	 * Errata i2075: USB2PHY: USB2PHY Charger Detect is Enabled by

	 * Default Without VBUS Presence.

	 *

	 * AM654x SR1.0 has a silicon bug due to which D+ is pulled high after

	 * POR, which could cause enumeration failure with some USB hubs.

	 * Disabling the USB2_PHY Charger Detect function will put D+

	 * into the normal state.

	 */

	if (soc_device_match(am65x_sr10_soc_devices))

		phy->flags |= OMAP_USB2_DISABLE_CHRG_DET;

}



static int omap_usb2_probe(struct platform_device *pdev)

{

	struct omap_usb	*phy;
@@ -366,14 +399,14 @@ static int omap_usb2_probe(struct platform_device *pdev) 
	phy->mask		= phy_data->mask;

	phy->power_on		= phy_data->power_on;

	phy->power_off		= phy_data->power_off;

	phy->flags		= phy_data->flags;



	omap_usb2_init_errata(phy);



	if (phy_data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	phy->phy_base = devm_ioremap_resource(&pdev->dev, res);

	if (IS_ERR(phy->phy_base))

		return PTR_ERR(phy->phy_base);

		phy->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;

	}



	phy->syscon_phy_power = syscon_regmap_lookup_by_phandle(node,

							"syscon-phy-power");

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