mips: vdso: Use generic VDSO clock mode storage (e1bdb22e) · Commits · 戴 / test

arch/mips/Kconfig

+1 −1

Original line number	Diff line number	Diff line
		@@ -4,7 +4,6 @@ config MIPS
		default y
		select ARCH_32BIT_OFF_T if !64BIT
		select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
		select ARCH_CLOCKSOURCE_DATA
		select ARCH_HAS_FORTIFY_SOURCE
		select ARCH_HAS_KCOV
		select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
		@@ -38,6 +37,7 @@ config MIPS
		select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
		select GENERIC_SMP_IDLE_THREAD
		select GENERIC_TIME_VSYSCALL
		select GENERIC_VDSO_CLOCK_MODE
		select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
		select HANDLE_DOMAIN_IRQ
		select HAVE_ARCH_COMPILER_H

+3 −15

Original line number	Diff line number	Diff line
		@@ -3,23 +3,11 @@
		* Copyright (C) 2015 Imagination Technologies
		* Author: Alex Smith <alex.smith@imgtec.com>
		*/

		#ifndef __ASM_CLOCKSOURCE_H
		#define __ASM_CLOCKSOURCE_H

		#include <linux/types.h>

		/* VDSO clocksources. */
		#define VDSO_CLOCK_NONE 0 /* No suitable clocksource. */
		#define VDSO_CLOCK_R4K 1 /* Use the coprocessor 0 count. */
		#define VDSO_CLOCK_GIC 2 /* Use the GIC. */

		/**
		* struct arch_clocksource_data - Architecture-specific clocksource information.
		* @vdso_clock_mode: Method the VDSO should use to access the clocksource.
		*/
		struct arch_clocksource_data {
		u8 vdso_clock_mode;
		};
		#define VDSO_ARCH_CLOCKMODES \
		VDSO_CLOCKMODE_R4K, \
		VDSO_CLOCKMODE_GIC

		#endif /* __ASM_CLOCKSOURCE_H */

+10 −20

Original line number	Diff line number	Diff line
		@@ -24,8 +24,6 @@

		#define VDSO_HAS_CLOCK_GETRES 1

		#define __VDSO_USE_SYSCALL ULLONG_MAX

		static __always_inline long gettimeofday_fallback(
		struct __kernel_old_timeval *_tv,
		struct timezone *_tz)
		@@ -175,28 +173,20 @@ static __always_inline u64 read_gic_count(const struct vdso_data *data)

		static __always_inline u64 __arch_get_hw_counter(s32 clock_mode)
		{
		#ifdef CONFIG_CLKSRC_MIPS_GIC
		const struct vdso_data *data = get_vdso_data();
		#endif
		u64 cycle_now;

		switch (clock_mode) {
		#ifdef CONFIG_CSRC_R4K
		case VDSO_CLOCK_R4K:
		cycle_now = read_r4k_count();
		break;
		if (clock_mode == VDSO_CLOCKMODE_R4K)
		return read_r4k_count();
		#endif
		#ifdef CONFIG_CLKSRC_MIPS_GIC
		case VDSO_CLOCK_GIC:
		cycle_now = read_gic_count(data);
		break;
		if (clock_mode == VDSO_CLOCKMODE_GIC)
		return read_gic_count(get_vdso_data());
		#endif
		default:
		cycle_now = __VDSO_USE_SYSCALL;
		break;
		}

		return cycle_now;
		/*
		* Core checks mode already. So this raced against a concurrent
		* update. Return something. Core will do another round see the
		* change and fallback to syscall.
		*/
		return 0;
		}

		static inline bool mips_vdso_hres_capable(void)

+0 −9

Original line number	Diff line number	Diff line
		@@ -19,15 +19,6 @@ struct vdso_data *__mips_get_k_vdso_data(void)
		}
		#define __arch_get_k_vdso_data __mips_get_k_vdso_data

		static __always_inline
		int __mips_get_clock_mode(struct timekeeper *tk)
		{
		u32 clock_mode = tk->tkr_mono.clock->archdata.vdso_clock_mode;

		return clock_mode;
		}
		#define __arch_get_clock_mode __mips_get_clock_mode

		/* The asm-generic header needs to be included after the definitions above */
		#include <asm-generic/vdso/vsyscall.h>

+1 −1

Original line number	Diff line number	Diff line
		@@ -78,7 +78,7 @@ int __init init_r4k_clocksource(void)
		* by the VDSO (HWREna is configured by configure_hwrena()).
		*/
		if (cpu_has_mips_r2_r6 && rdhwr_count_usable())
		clocksource_mips.archdata.vdso_clock_mode = VDSO_CLOCK_R4K;
		clocksource_mips.vdso_clock_mode = VDSO_CLOCKMODE_R4K;

		clocksource_register_hz(&clocksource_mips, mips_hpt_frequency);