Commit e18b9431 authored Feb 20, 2017 by Chris Wilson

drm/i915: Remove unrequired POSTING_READ from gen6_set_rps()

The uncached mmio is sufficient to queue the mmio writes without raising
forcewake. The forced flush along with acquiring forcewake from the
posting read is not required for adjusting the RPS frequency.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170220094713.22874-3-chris@chris-wilson.co.uk

Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>

parent 76e4e4b5

drivers/gpu/drm/i915/intel_pm.c

+0 −2

Original line number	Diff line number	Diff line
		@@ -4939,8 +4939,6 @@ static int gen6_set_rps(struct drm_i915_private *dev_priv, u8 val)
		I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, intel_rps_limits(dev_priv, val));
		I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val));

		POSTING_READ(GEN6_RPNSWREQ);

		dev_priv->rps.cur_freq = val;
		trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));