Commit e15fc81f authored by Eric Yang's avatar Eric Yang Committed by Alex Deucher
Browse files

drm/amd/display: clean up encoding checks 



[Why]
All ASICS we support has YCbCr support, so
the check is unnecessary, the currently logic
in validate output also returns true all
the time, so the unneccessary logic is removed

Signed-off-by: default avatarEric Yang <Eric.Yang2@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b7cd6487

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

+1 −15
Original line number Diff line number Diff line
@@ -665,21 +665,7 @@ bool dce110_link_encoder_validate_dp_output( 
	if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)

		return false;



	/* default RGB only */

	if (crtc_timing->pixel_encoding == PIXEL_ENCODING_RGB)

	return true;



	if (enc110->base.features.flags.bits.IS_YCBCR_CAPABLE)

		return true;



	/* for DCE 8.x or later DP Y-only feature,

	 * we need ASIC cap + FeatureSupportDPYonly, not support 666 */

	if (crtc_timing->flags.Y_ONLY &&

		enc110->base.features.flags.bits.IS_YCBCR_CAPABLE &&

		crtc_timing->display_color_depth != COLOR_DEPTH_666)

		return true;



	return false;

}



void dce110_link_encoder_construct(

drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c

+1 −2
Original line number Diff line number Diff line
@@ -551,8 +551,7 @@ static const struct encoder_feature_support link_enc_feature = { 
		.max_hdmi_deep_color = COLOR_DEPTH_121212,

		.max_hdmi_pixel_clock = 300000,

		.flags.bits.IS_HBR2_CAPABLE = true,

		.flags.bits.IS_TPS3_CAPABLE = true,

		.flags.bits.IS_YCBCR_CAPABLE = true

		.flags.bits.IS_TPS3_CAPABLE = true

};



struct link_encoder *dce100_link_encoder_create(

drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c

+1 −2
Original line number Diff line number Diff line
@@ -570,8 +570,7 @@ static const struct encoder_feature_support link_enc_feature = { 
		.max_hdmi_deep_color = COLOR_DEPTH_121212,

		.max_hdmi_pixel_clock = 594000,

		.flags.bits.IS_HBR2_CAPABLE = true,

		.flags.bits.IS_TPS3_CAPABLE = true,

		.flags.bits.IS_YCBCR_CAPABLE = true

		.flags.bits.IS_TPS3_CAPABLE = true

};



static struct link_encoder *dce110_link_encoder_create(

drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c

+1 −2
Original line number Diff line number Diff line
@@ -555,8 +555,7 @@ static const struct encoder_feature_support link_enc_feature = { 
		.flags.bits.IS_HBR2_CAPABLE = true,

		.flags.bits.IS_HBR3_CAPABLE = true,

		.flags.bits.IS_TPS3_CAPABLE = true,

		.flags.bits.IS_TPS4_CAPABLE = true,

		.flags.bits.IS_YCBCR_CAPABLE = true

		.flags.bits.IS_TPS4_CAPABLE = true

};



struct link_encoder *dce112_link_encoder_create(

drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c

+0 −1
Original line number Diff line number Diff line
@@ -609,7 +609,6 @@ static const struct encoder_feature_support link_enc_feature = { 
		.flags.bits.IS_HBR3_CAPABLE = true,

		.flags.bits.IS_TPS3_CAPABLE = true,

		.flags.bits.IS_TPS4_CAPABLE = true,

		.flags.bits.IS_YCBCR_CAPABLE = true

};



static struct link_encoder *dce120_link_encoder_create(

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