Commit e15b682a authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/core: initial support for boards with TU117 chipset 



Modesetting only, still waiting on ACR/GR firmware from NVIDIA for Turing
graphics/compute bring-up.

Each subsystem was compared with traces, along with various tests to check
that things generally work as they should, and appears compatible enough
with the current TU106 code to enable support.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent a2ac09a0

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+36 −0
Original line number Diff line number Diff line
@@ -2540,6 +2540,41 @@ nv166_chipset = { 
	.sec2 = tu102_sec2_new,

};



static const struct nvkm_device_chip

nv167_chipset = {

	.name = "TU117",

	.bar = tu102_bar_new,

	.bios = nvkm_bios_new,

	.bus = gf100_bus_new,

	.devinit = tu102_devinit_new,

	.fault = tu102_fault_new,

	.fb = gv100_fb_new,

	.fuse = gm107_fuse_new,

	.gpio = gk104_gpio_new,

	.gsp = gv100_gsp_new,

	.i2c = gm200_i2c_new,

	.ibus = gm200_ibus_new,

	.imem = nv50_instmem_new,

	.ltc = gp102_ltc_new,

	.mc = tu102_mc_new,

	.mmu = tu102_mmu_new,

	.pci = gp100_pci_new,

	.pmu = gp102_pmu_new,

	.therm = gp100_therm_new,

	.timer = gk20a_timer_new,

	.top = gk104_top_new,

	.ce[0] = tu102_ce_new,

	.ce[1] = tu102_ce_new,

	.ce[2] = tu102_ce_new,

	.ce[3] = tu102_ce_new,

	.ce[4] = tu102_ce_new,

	.disp = tu102_disp_new,

	.dma = gv100_dma_new,

	.fifo = tu102_fifo_new,

	.nvdec[0] = gp102_nvdec_new,

	.sec2 = tu102_sec2_new,

};



static int

nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,

		       struct nvkm_notify *notify)
@@ -3016,6 +3051,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, 
		case 0x162: device->chip = &nv162_chipset; break;

		case 0x164: device->chip = &nv164_chipset; break;

		case 0x166: device->chip = &nv166_chipset; break;

		case 0x167: device->chip = &nv167_chipset; break;

		default:

			nvdev_error(device, "unknown chipset (%08x)\n", boot0);

			goto done;

CRA Git | Maintained and supported by SUSTech CRA and CCSE