Commit e13af9a8 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2013-07-12' of... 

Merge tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

 Highlights:
- follow-up refactoring after the shared dpll rework that landed in 3.11
- oddball prep cleanups from Ben for ppgtt
- encoder->get_config state tracking infrastructure from Jesse
- used by the experimental fastboot support from Jesse (disabled by
  default)
- make the error state file official and add it to our sysfs interface
  (Mika)
- drm_mm prep changes from Ben, prepares to embedd the drm_mm_node (which
  will be used by the vma rework later on)
- interrupt handling rework, follow up cleanups to the VECS enabling, hpd
  storm handling and fifo underrun reporting.
- Big pile of smaller cleanups, code improvements and related stuff.

* tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel: (72 commits)
  drm/i915: clear DPLL reg when disabling i9xx dplls
  drm/i915: Fix up cpt pixel multiplier enable sequence
  drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence
  drm/i915: move error state to own compilation unit
  drm/i915: Don't attempt to read an unitialized stack value
  drm/i915: Use for_each_pipe() when possible
  drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT
  drm/i915: unify ring irq refcounts (again)
  drm/i915: kill dev_priv->rps.lock
  drm/i915: queue work outside spinlock in hsw_pm_irq_handler
  drm/i915: streamline hsw_pm_irq_handler
  drm/i915: irq handlers don't need interrupt-safe spinlocks
  drm/i915: kill lpt pch transcoder->crtc mapping code for fifo underruns
  drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting
  drm/i915: improve SERR_INT clearing for fifo underrun reporting
  drm/i915: extract ibx_display_interrupt_update
  drm/i915: remove unused members from drm_i915_private
  drm/i915: don't frob mm.suspended when not using ums
  drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients
  drm/i915: WARN if the bios reserved range is bigger than stolen size
  ...

Conflicts:
	drivers/gpu/drm/i915/i915_gem.c
parents ee114b97 50b44a44

drivers/gpu/drm/drm_mm.c

+13 −18
Original line number Diff line number Diff line
@@ -147,33 +147,27 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node, 
	}

}



struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm,

					unsigned long start,

					unsigned long size,

					bool atomic)

int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node)

{

	struct drm_mm_node *hole, *node;

	unsigned long end = start + size;

	struct drm_mm_node *hole;

	unsigned long end = node->start + node->size;

	unsigned long hole_start;

	unsigned long hole_end;



	BUG_ON(node == NULL);



	/* Find the relevant hole to add our node to */

	drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {

		if (hole_start > start || hole_end < end)

		if (hole_start > node->start || hole_end < end)

			continue;



		node = drm_mm_kmalloc(mm, atomic);

		if (unlikely(node == NULL))

			return NULL;



		node->start = start;

		node->size = size;

		node->mm = mm;

		node->allocated = 1;



		INIT_LIST_HEAD(&node->hole_stack);

		list_add(&node->node_list, &hole->node_list);



		if (start == hole_start) {

		if (node->start == hole_start) {

			hole->hole_follows = 0;

			list_del_init(&hole->hole_stack);

		}
@@ -184,13 +178,14 @@ struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm, 
			node->hole_follows = 1;

		}



		return node;

		return 0;

	}



	WARN(1, "no hole found for block 0x%lx + 0x%lx\n", start, size);

	return NULL;

	WARN(1, "no hole found for node 0x%lx + 0x%lx\n",

	     node->start, node->size);

	return -ENOSPC;

}

EXPORT_SYMBOL(drm_mm_create_block);

EXPORT_SYMBOL(drm_mm_reserve_node);



struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *hole_node,

					     unsigned long size,

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
ccflags-y := -Iinclude/drm

i915-y := i915_drv.o i915_dma.o i915_irq.o \

	  i915_debugfs.o \

	  i915_gpu_error.o \

          i915_suspend.o \

	  i915_gem.o \

	  i915_gem_context.o \

drivers/gpu/drm/i915/i915_debugfs.c

+115 −543

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/i915_dma.c

+8 −14
Original line number Diff line number Diff line
@@ -1323,10 +1323,8 @@ static int i915_load_modeset_init(struct drm_device *dev) 
	/* Always safe in the mode setting case. */

	/* FIXME: do pre/post-mode set stuff in core KMS code */

	dev->vblank_disable_allowed = 1;

	if (INTEL_INFO(dev)->num_pipes == 0) {

		dev_priv->mm.suspended = 0;

	if (INTEL_INFO(dev)->num_pipes == 0)

		return 0;

	}



	ret = intel_fbdev_init(dev);

	if (ret)
@@ -1352,9 +1350,6 @@ static int i915_load_modeset_init(struct drm_device *dev) 


	drm_kms_helper_poll_init(dev);



	/* We're off and running w/KMS */

	dev_priv->mm.suspended = 0;



	return 0;



cleanup_gem:
@@ -1558,7 +1553,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
		goto out_rmmap;

	}



	dev_priv->mm.gtt_mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,

	dev_priv->gtt.mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,

					      aperture_size);



	/* The i915 workqueue is primarily used for batched retirement of
@@ -1612,7 +1607,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 


	spin_lock_init(&dev_priv->irq_lock);

	spin_lock_init(&dev_priv->gpu_error.lock);

	spin_lock_init(&dev_priv->rps.lock);

	spin_lock_init(&dev_priv->backlight.lock);

	mutex_init(&dev_priv->dpio_lock);
@@ -1629,9 +1623,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
			goto out_gem_unload;

	}



	/* Start out suspended */

	dev_priv->mm.suspended = 1;



	if (HAS_POWER_WELL(dev))

		i915_init_power_well(dev);
@@ -1641,6 +1632,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
			DRM_ERROR("failed to init modeset\n");

			goto out_gem_unload;

		}

	} else {

		/* Start out suspended in ums mode. */

		dev_priv->ums.mm_suspended = 1;

	}



	i915_setup_sysfs(dev);
@@ -1667,7 +1661,7 @@ out_gem_unload: 
	intel_teardown_mchbar(dev);

	destroy_workqueue(dev_priv->wq);

out_mtrrfree:

	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);

	arch_phys_wc_del(dev_priv->gtt.mtrr);

	io_mapping_free(dev_priv->gtt.mappable);

	dev_priv->gtt.gtt_remove(dev);

out_rmmap:
@@ -1705,7 +1699,7 @@ int i915_driver_unload(struct drm_device *dev) 
	cancel_delayed_work_sync(&dev_priv->mm.retire_work);



	io_mapping_free(dev_priv->gtt.mappable);

	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);

	arch_phys_wc_del(dev_priv->gtt.mtrr);



	acpi_video_unregister();

drivers/gpu/drm/i915/i915_drv.c

+21 −12
Original line number Diff line number Diff line
@@ -132,6 +132,11 @@ int i915_enable_ips __read_mostly = 1; 
module_param_named(enable_ips, i915_enable_ips, int, 0600);

MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");



bool i915_fastboot __read_mostly = 0;

module_param_named(fastboot, i915_fastboot, bool, 0600);

MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "

		 "(default: false)");



static struct drm_driver driver;

extern int intel_agp_enabled;
@@ -551,7 +556,11 @@ static int i915_drm_freeze(struct drm_device *dev) 


	/* If KMS is active, we do the leavevt stuff here */

	if (drm_core_check_feature(dev, DRIVER_MODESET)) {

		int error = i915_gem_idle(dev);

		int error;



		mutex_lock(&dev->struct_mutex);

		error = i915_gem_idle(dev);

		mutex_unlock(&dev->struct_mutex);

		if (error) {

			dev_err(&dev->pdev->dev,

				"GEM idle failed, resume might fail\n");
@@ -656,7 +665,6 @@ static int __i915_drm_thaw(struct drm_device *dev) 
		intel_init_pch_refclk(dev);



		mutex_lock(&dev->struct_mutex);

		dev_priv->mm.suspended = 0;



		error = i915_gem_init_hw(dev);

		mutex_unlock(&dev->struct_mutex);
@@ -793,28 +801,29 @@ static int i965_reset_complete(struct drm_device *dev) 
static int i965_do_reset(struct drm_device *dev)

{

	int ret;

	u8 gdrst;



	/*

	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as

	 * well as the reset bit (GR/bit 0).  Setting the GR bit

	 * triggers the reset; when done, the hardware will clear it.

	 */

	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);

	pci_write_config_byte(dev->pdev, I965_GDRST,

			      gdrst | GRDOM_RENDER |

			      GRDOM_RESET_ENABLE);

			      GRDOM_RENDER | GRDOM_RESET_ENABLE);

	ret =  wait_for(i965_reset_complete(dev), 500);

	if (ret)

		return ret;



	/* We can't reset render&media without also resetting display ... */

	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);

	pci_write_config_byte(dev->pdev, I965_GDRST,

			      gdrst | GRDOM_MEDIA |

			      GRDOM_RESET_ENABLE);

			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);



	return wait_for(i965_reset_complete(dev), 500);

	ret =  wait_for(i965_reset_complete(dev), 500);

	if (ret)

		return ret;



	pci_write_config_byte(dev->pdev, I965_GDRST, 0);



	return 0;

}



static int ironlake_do_reset(struct drm_device *dev)
@@ -955,11 +964,11 @@ int i915_reset(struct drm_device *dev) 
	 * switched away).

	 */

	if (drm_core_check_feature(dev, DRIVER_MODESET) ||

			!dev_priv->mm.suspended) {

			!dev_priv->ums.mm_suspended) {

		struct intel_ring_buffer *ring;

		int i;



		dev_priv->mm.suspended = 0;

		dev_priv->ums.mm_suspended = 0;



		i915_gem_init_swizzling(dev);

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