Commit e0aa4a92 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: issue proper hdp flush for table transferring 



Guard the content consistence between the view of GPU and CPU
during the table transferring.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 29a45960

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+10 −5
Original line number Diff line number Diff line
@@ -529,8 +529,14 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int 


	table_size = smu_table->tables[table_index].size;



	if (drv2smu)

	if (drv2smu) {

		memcpy(table->cpu_addr, table_data, table_size);

		/*

		 * Flush hdp cache: to guard the content seen by

		 * GPU is consitent with CPU.

		 */

		amdgpu_asic_flush_hdp(adev, NULL);

	}



	ret = smu_send_smc_msg_with_param(smu, drv2smu ?

					  SMU_MSG_TransferTableDram2Smu :
@@ -539,11 +545,10 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int 
	if (ret)

		return ret;



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);



	if (!drv2smu)

	if (!drv2smu) {

		amdgpu_asic_flush_hdp(adev, NULL);

		memcpy(table_data, table->cpu_addr, table_size);

	}



	return ret;

}

drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c

+4 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr, 
			priv->smu_tables.entry[table_id].table_id);



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);

	amdgpu_asic_flush_hdp(adev, NULL);



	memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,

			priv->smu_tables.entry[table_id].size);
@@ -150,6 +150,7 @@ static int smu10_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
{

	struct smu10_smumgr *priv =

			(struct smu10_smumgr *)(hwmgr->smu_backend);

	struct amdgpu_device *adev = hwmgr->adev;



	PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,

			"Invalid SMU Table ID!", return -EINVAL;);
@@ -161,6 +162,8 @@ static int smu10_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
	memcpy(priv->smu_tables.entry[table_id].table, table,

			priv->smu_tables.entry[table_id].size);



	amdgpu_asic_flush_hdp(adev, NULL);



	smu10_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));

drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c

+4 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr, 
			priv->smu_tables.entry[table_id].table_id);



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);

	amdgpu_asic_flush_hdp(adev, NULL);



	memcpy(table, priv->smu_tables.entry[table_id].table,

			priv->smu_tables.entry[table_id].size);
@@ -70,6 +70,7 @@ static int vega10_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
		uint8_t *table, int16_t table_id)

{

	struct vega10_smumgr *priv = hwmgr->smu_backend;

	struct amdgpu_device *adev = hwmgr->adev;



	/* under sriov, vbios or hypervisor driver

	 * has already copy table to smc so here only skip it
@@ -87,6 +88,8 @@ static int vega10_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
	memcpy(priv->smu_tables.entry[table_id].table, table,

			priv->smu_tables.entry[table_id].size);



	amdgpu_asic_flush_hdp(adev, NULL);



	smu9_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));

drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c

+4 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr, 
			return -EINVAL);



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);

	amdgpu_asic_flush_hdp(adev, NULL);



	memcpy(table, priv->smu_tables.entry[table_id].table,

			priv->smu_tables.entry[table_id].size);
@@ -84,6 +84,7 @@ static int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
{

	struct vega12_smumgr *priv =

			(struct vega12_smumgr *)(hwmgr->smu_backend);

	struct amdgpu_device *adev = hwmgr->adev;



	PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,

			"Invalid SMU Table ID!", return -EINVAL);
@@ -95,6 +96,8 @@ static int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
	memcpy(priv->smu_tables.entry[table_id].table, table,

			priv->smu_tables.entry[table_id].size);



	amdgpu_asic_flush_hdp(adev, NULL);



	PP_ASSERT_WITH_CODE(smu9_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr)) == 0,

drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c

+8 −2
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr, 
			return ret);



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);

	amdgpu_asic_flush_hdp(adev, NULL);



	memcpy(table, priv->smu_tables.entry[table_id].table,

			priv->smu_tables.entry[table_id].size);
@@ -207,6 +207,7 @@ static int vega20_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
{

	struct vega20_smumgr *priv =

			(struct vega20_smumgr *)(hwmgr->smu_backend);

	struct amdgpu_device *adev = hwmgr->adev;

	int ret = 0;



	PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
@@ -219,6 +220,8 @@ static int vega20_copy_table_to_smc(struct pp_hwmgr *hwmgr, 
	memcpy(priv->smu_tables.entry[table_id].table, table,

			priv->smu_tables.entry[table_id].size);



	amdgpu_asic_flush_hdp(adev, NULL);



	PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[table_id].mc_addr))) == 0,
@@ -242,11 +245,14 @@ int vega20_set_activity_monitor_coeff(struct pp_hwmgr *hwmgr, 
{

	struct vega20_smumgr *priv =

			(struct vega20_smumgr *)(hwmgr->smu_backend);

	struct amdgpu_device *adev = hwmgr->adev;

	int ret = 0;



	memcpy(priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].table, table,

			priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size);



	amdgpu_asic_flush_hdp(adev, NULL);



	PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,

			PPSMC_MSG_SetDriverDramAddrHigh,

			upper_32_bits(priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].mc_addr))) == 0,
@@ -290,7 +296,7 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr, 
			return ret);



	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);

	amdgpu_asic_flush_hdp(adev, NULL);



	memcpy(table, priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].table,

			priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size);

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