Commit dfecd3e0 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-dsa-mv88e6xxx-port-mtu-support' 



Chris Packham says:

====================
net: dsa: mv88e6xxx: port mtu support

This series connects up the mv88e6xxx switches to the dsa infrastructure for
configuring the port MTU. The first patch is also a bug fix which might be a
candiatate for stable.

I've rebased this series on top of net-next/master to pick up Andrew's change
for the gigabit switches. Patch 1 and 2 are unchanged (aside from adding
Andrew's Reviewed-by). Patch 3 is reworked to make use of the existing mtu
support.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 9b964f16 1baf0fac

drivers/net/dsa/mv88e6xxx/chip.c

+11 −1
Original line number Diff line number Diff line
@@ -2699,6 +2699,8 @@ static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port) 


	if (chip->info->ops->port_set_jumbo_size)

		return 10240;

	else if (chip->info->ops->set_max_frame_size)

		return 1632;

	return 1522;

}
@@ -2710,6 +2712,8 @@ static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 
	mv88e6xxx_reg_lock(chip);

	if (chip->info->ops->port_set_jumbo_size)

		ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu);

	else if (chip->info->ops->set_max_frame_size)

		ret = chip->info->ops->set_max_frame_size(chip, new_mtu);

	else

		if (new_mtu > 1522)

			ret = -EINVAL;
@@ -3450,6 +3454,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = { 
	.vtu_getnext = mv88e6352_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.phylink_validate = mv88e6185_phylink_validate,

	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,

};



static const struct mv88e6xxx_ops mv88e6095_ops = {
@@ -3478,6 +3483,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = { 
	.vtu_getnext = mv88e6185_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,

	.phylink_validate = mv88e6185_phylink_validate,

	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,

};



static const struct mv88e6xxx_ops mv88e6097_ops = {
@@ -3494,7 +3500,6 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { 
	.port_set_frame_mode = mv88e6351_port_set_frame_mode,

	.port_set_egress_floods = mv88e6352_port_set_egress_floods,

	.port_set_ether_type = mv88e6351_port_set_ether_type,

	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,

	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,

	.port_pause_limit = mv88e6097_port_pause_limit,

	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
@@ -3516,6 +3521,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { 
	.vtu_getnext = mv88e6352_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.phylink_validate = mv88e6185_phylink_validate,

	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,

};



static const struct mv88e6xxx_ops mv88e6123_ops = {
@@ -3550,6 +3556,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = { 
	.vtu_getnext = mv88e6352_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,

	.phylink_validate = mv88e6185_phylink_validate,

	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,

};



static const struct mv88e6xxx_ops mv88e6131_ops = {
@@ -3939,6 +3946,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = { 
	.vtu_getnext = mv88e6185_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,

	.phylink_validate = mv88e6185_phylink_validate,

	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,

};



static const struct mv88e6xxx_ops mv88e6190_ops = {
@@ -3959,6 +3967,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = { 
	.port_set_frame_mode = mv88e6351_port_set_frame_mode,

	.port_set_egress_floods = mv88e6352_port_set_egress_floods,

	.port_set_ether_type = mv88e6351_port_set_ether_type,

	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,

	.port_pause_limit = mv88e6390_port_pause_limit,

	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,

	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
@@ -4017,6 +4026,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = { 
	.port_set_frame_mode = mv88e6351_port_set_frame_mode,

	.port_set_egress_floods = mv88e6352_port_set_egress_floods,

	.port_set_ether_type = mv88e6351_port_set_ether_type,

	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,

	.port_pause_limit = mv88e6390_port_pause_limit,

	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,

	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,

drivers/net/dsa/mv88e6xxx/chip.h

+3 −0
Original line number Diff line number Diff line
@@ -552,6 +552,9 @@ struct mv88e6xxx_ops { 
	void (*phylink_validate)(struct mv88e6xxx_chip *chip, int port,

				 unsigned long *mask,

				 struct phylink_link_state *state);



	/* Max Frame Size */

	int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);

};



struct mv88e6xxx_irq_ops {

drivers/net/dsa/mv88e6xxx/global1.c

+17 −0
Original line number Diff line number Diff line
@@ -196,6 +196,23 @@ int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip) 
	return mv88e6185_g1_wait_ppu_disabled(chip);

}



int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu)

{

	u16 val;

	int err;



	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &val);

	if (err)

		return err;



	val &= ~MV88E6185_G1_CTL1_MAX_FRAME_1632;



	if (mtu > 1518)

		val |= MV88E6185_G1_CTL1_MAX_FRAME_1632;



	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);

}



/* Offset 0x10: IP-PRI Mapping Register 0

 * Offset 0x11: IP-PRI Mapping Register 1

 * Offset 0x12: IP-PRI Mapping Register 2

drivers/net/dsa/mv88e6xxx/global1.h

+2 −0
Original line number Diff line number Diff line
@@ -282,6 +282,8 @@ int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip); 
int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);

int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);



int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu);



int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);

int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);

int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);

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