Commit dfd2bb84 authored by Marcelo Tosatti's avatar Marcelo Tosatti
Browse files

Merge branch 'kvm-arm-for-3.10' of git://github.com/columbia/linux-kvm-arm into queue 

* 'kvm-arm-for-3.10' of git://github.com/columbia/linux-kvm-arm:
  ARM: KVM: iterate over all CPUs for CPU compatibility check
  KVM: ARM: Fix spelling in error message
  ARM: KVM: define KVM_ARM_MAX_VCPUS unconditionally
  KVM: ARM: Fix API documentation for ONE_REG encoding
  ARM: KVM: promote vfp_host pointer to generic host cpu context
  ARM: KVM: add architecture specific hook for capabilities
  ARM: KVM: perform HYP initilization for hotplugged CPUs
  ARM: KVM: switch to a dual-step HYP init code
  ARM: KVM: rework HYP page table freeing
  ARM: KVM: enforce maximum size for identity mapped code
  ARM: KVM: move to a KVM provided HYP idmap
  ARM: KVM: fix HYP mapping limitations around zero
  ARM: KVM: simplify HYP mapping population
  ARM: KVM: arch_timer: use symbolic constants
  ARM: KVM: add support for minimal host vs guest profiling
parents 03b28f81 d4e071ce

Documentation/virtual/kvm/api.txt

+6 −6
Original line number Diff line number Diff line
@@ -1814,22 +1814,22 @@ ARM registers are mapped using the lower 32 bits. The upper 16 of that 
is the register group type, or coprocessor number:



ARM core registers have the following id bit patterns:

  0x4002 0000 0010 <index into the kvm_regs struct:16>

  0x4020 0000 0010 <index into the kvm_regs struct:16>



ARM 32-bit CP15 registers have the following id bit patterns:

  0x4002 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>

  0x4020 0000 000F <zero:1> <crn:4> <crm:4> <opc1:4> <opc2:3>



ARM 64-bit CP15 registers have the following id bit patterns:

  0x4003 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>

  0x4030 0000 000F <zero:1> <zero:4> <crm:4> <opc1:4> <zero:3>



ARM CCSIDR registers are demultiplexed by CSSELR value:

  0x4002 0000 0011 00 <csselr:8>

  0x4020 0000 0011 00 <csselr:8>



ARM 32-bit VFP control registers have the following id bit patterns:

  0x4002 0000 0012 1 <regno:12>

  0x4020 0000 0012 1 <regno:12>



ARM 64-bit FP registers have the following id bit patterns:

  0x4002 0000 0012 0 <regno:12>

  0x4030 0000 0012 0 <regno:12>



4.69 KVM_GET_ONE_REG

arch/arm/include/asm/idmap.h

+0 −1
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ 
#define __idmap __section(.idmap.text) noinline notrace



extern pgd_t *idmap_pgd;

extern pgd_t *hyp_pgd;



void setup_mm_for_reboot(void);

arch/arm/include/asm/kvm_host.h

+32 −15
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ struct kvm_vcpu_fault_info { 
	u32 hyp_pc;		/* PC when exception was taken from Hyp mode */

};



typedef struct vfp_hard_struct kvm_kernel_vfp_t;

typedef struct vfp_hard_struct kvm_cpu_context_t;



struct kvm_vcpu_arch {

	struct kvm_regs regs;
@@ -105,8 +105,10 @@ struct kvm_vcpu_arch { 
	struct kvm_vcpu_fault_info fault;



	/* Floating point registers (VFP and Advanced SIMD/NEON) */

	kvm_kernel_vfp_t vfp_guest;

	kvm_kernel_vfp_t *vfp_host;

	struct vfp_hard_struct vfp_guest;



	/* Host FP context */

	kvm_cpu_context_t *host_cpu_context;



	/* VGIC state */

	struct vgic_cpu vgic_cpu;
@@ -188,23 +190,38 @@ int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); 
int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,

		int exception_index);



static inline void __cpu_init_hyp_mode(unsigned long long pgd_ptr,

static inline void __cpu_init_hyp_mode(unsigned long long boot_pgd_ptr,

				       unsigned long long pgd_ptr,

				       unsigned long hyp_stack_ptr,

				       unsigned long vector_ptr)

{

	unsigned long pgd_low, pgd_high;



	pgd_low = (pgd_ptr & ((1ULL << 32) - 1));

	pgd_high = (pgd_ptr >> 32ULL);



	/*

	 * Call initialization code, and switch to the full blown

	 * HYP code. The init code doesn't need to preserve these registers as

	 * r1-r3 and r12 are already callee save according to the AAPCS.

	 * Note that we slightly misuse the prototype by casing the pgd_low to

	 * a void *.

	 * Call initialization code, and switch to the full blown HYP

	 * code. The init code doesn't need to preserve these

	 * registers as r0-r3 are already callee saved according to

	 * the AAPCS.

	 * Note that we slightly misuse the prototype by casing the

	 * stack pointer to a void *.

	 *

	 * We don't have enough registers to perform the full init in

	 * one go.  Install the boot PGD first, and then install the

	 * runtime PGD, stack pointer and vectors. The PGDs are always

	 * passed as the third argument, in order to be passed into

	 * r2-r3 to the init code (yes, this is compliant with the

	 * PCS!).

	 */

	kvm_call_hyp((void *)pgd_low, pgd_high, hyp_stack_ptr, vector_ptr);



	kvm_call_hyp(NULL, 0, boot_pgd_ptr);



	kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);

}



static inline int kvm_arch_dev_ioctl_check_extension(long ext)

{

	return 0;

}



int kvm_perf_init(void);

int kvm_perf_teardown(void);



#endif /* __ARM_KVM_HOST_H__ */

arch/arm/include/asm/kvm_mmu.h

+23 −5
Original line number Diff line number Diff line
@@ -19,21 +19,33 @@ 
#ifndef __ARM_KVM_MMU_H__

#define __ARM_KVM_MMU_H__



#include <asm/cacheflush.h>

#include <asm/pgalloc.h>

#include <asm/idmap.h>

#include <asm/memory.h>

#include <asm/page.h>



/*

 * We directly use the kernel VA for the HYP, as we can directly share

 * the mapping (HTTBR "covers" TTBR1).

 */

#define HYP_PAGE_OFFSET_MASK	(~0UL)

#define HYP_PAGE_OFFSET_MASK	UL(~0)

#define HYP_PAGE_OFFSET		PAGE_OFFSET

#define KERN_TO_HYP(kva)	(kva)



/*

 * Our virtual mapping for the boot-time MMU-enable code. Must be

 * shared across all the page-tables. Conveniently, we use the vectors

 * page, where no kernel data will ever be shared with HYP.

 */

#define TRAMPOLINE_VA		UL(CONFIG_VECTORS_BASE)



#ifndef __ASSEMBLY__



#include <asm/cacheflush.h>

#include <asm/pgalloc.h>



int create_hyp_mappings(void *from, void *to);

int create_hyp_io_mappings(void *from, void *to, phys_addr_t);

void free_hyp_pmds(void);

void free_boot_hyp_pgd(void);

void free_hyp_pgds(void);



int kvm_alloc_stage2_pgd(struct kvm *kvm);

void kvm_free_stage2_pgd(struct kvm *kvm);
@@ -45,6 +57,8 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run); 
void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);



phys_addr_t kvm_mmu_get_httbr(void);

phys_addr_t kvm_mmu_get_boot_httbr(void);

phys_addr_t kvm_get_idmap_vector(void);

int kvm_mmu_init(void);

void kvm_clear_hyp_idmap(void);
@@ -114,4 +128,8 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn) 
	}

}



#define kvm_flush_dcache_to_poc(a,l)	__cpuc_flush_dcache_area((a), (l))



#endif	/* !__ASSEMBLY__ */



#endif /* __ARM_KVM_MMU_H__ */

arch/arm/kernel/asm-offsets.c

+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ int main(void) 
  DEFINE(VCPU_MIDR,		offsetof(struct kvm_vcpu, arch.midr));

  DEFINE(VCPU_CP15,		offsetof(struct kvm_vcpu, arch.cp15));

  DEFINE(VCPU_VFP_GUEST,	offsetof(struct kvm_vcpu, arch.vfp_guest));

  DEFINE(VCPU_VFP_HOST,		offsetof(struct kvm_vcpu, arch.vfp_host));

  DEFINE(VCPU_VFP_HOST,		offsetof(struct kvm_vcpu, arch.host_cpu_context));

  DEFINE(VCPU_REGS,		offsetof(struct kvm_vcpu, arch.regs));

  DEFINE(VCPU_USR_REGS,		offsetof(struct kvm_vcpu, arch.regs.usr_regs));

  DEFINE(VCPU_SVC_REGS,		offsetof(struct kvm_vcpu, arch.regs.svc_regs));

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