Commit dfb9b69e authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'perf-urgent-for-mingo-5.6-20200214' of... 

Merge tag 'perf-urgent-for-mingo-5.6-20200214' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

 into perf/urgent

Pull perf/urgent fixes from Arnaldo Carvalho de Melo:

BPF:

  Arnaldo Carvalho de Melo:

  - Fix script used to obtain kernel make directives to work with new kbuild
    used for building BPF programs.

maps:

  Jiri Olsa:

  - Fixup kmap->kmaps backpointer in kernel maps.

arm64:

  John Garry:

  - Add arm64 version of get_cpuid() to get proper, arm64 specific output from
    'perf list' and other tools.

perf top:

  Kim Phillips:

  - Update kernel idle symbols so that output in AMD systems is in line with
    other systems.

perf stat:

  Kim Phillips:

  - Don't report a null stalled cycles per insn metric.

tools headers:

  Arnaldo Carvalho de Melo:

  - Sync tools/ headers with the kernel sources to get things like syscall
    numbers and new arguments so that 'perf trace' can decode and use them in
    tracepoint filters, e.g. prctl's new PR_{G,S}ET_IO_FLUSHER options.

Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents f861854e 62765941

tools/arch/arm64/include/uapi/asm/kvm.h

+10 −2
Original line number Diff line number Diff line
@@ -220,10 +220,18 @@ struct kvm_vcpu_events { 
#define KVM_REG_ARM_PTIMER_CVAL		ARM64_SYS_REG(3, 3, 14, 2, 2)

#define KVM_REG_ARM_PTIMER_CNT		ARM64_SYS_REG(3, 3, 14, 0, 1)



/* EL0 Virtual Timer Registers */

/*

 * EL0 Virtual Timer Registers

 *

 * WARNING:

 *      KVM_REG_ARM_TIMER_CVAL and KVM_REG_ARM_TIMER_CNT are not defined

 *      with the appropriate register encodings.  Their values have been

 *      accidentally swapped.  As this is set API, the definitions here

 *      must be used, rather than ones derived from the encodings.

 */

#define KVM_REG_ARM_TIMER_CTL		ARM64_SYS_REG(3, 3, 14, 3, 1)

#define KVM_REG_ARM_TIMER_CNT		ARM64_SYS_REG(3, 3, 14, 3, 2)

#define KVM_REG_ARM_TIMER_CVAL		ARM64_SYS_REG(3, 3, 14, 0, 2)

#define KVM_REG_ARM_TIMER_CNT		ARM64_SYS_REG(3, 3, 14, 3, 2)



/* KVM-as-firmware specific pseudo-registers */

#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)

tools/arch/arm64/include/uapi/asm/unistd.h

+1 −0
Original line number Diff line number Diff line
@@ -19,5 +19,6 @@ 
#define __ARCH_WANT_NEW_STAT

#define __ARCH_WANT_SET_GET_RLIMIT

#define __ARCH_WANT_TIME32_SYSCALLS

#define __ARCH_WANT_SYS_CLONE3



#include <asm-generic/unistd.h>

tools/arch/x86/include/asm/cpufeatures.h

+2 −0
Original line number Diff line number Diff line
@@ -220,6 +220,7 @@ 
#define X86_FEATURE_ZEN			( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */

#define X86_FEATURE_L1TF_PTEINV		( 7*32+29) /* "" L1TF workaround PTE inversion */

#define X86_FEATURE_IBRS_ENHANCED	( 7*32+30) /* Enhanced IBRS */

#define X86_FEATURE_MSR_IA32_FEAT_CTL	( 7*32+31) /* "" MSR IA32_FEAT_CTL configured */



/* Virtualization flags: Linux defined, word 8 */

#define X86_FEATURE_TPR_SHADOW		( 8*32+ 0) /* Intel TPR Shadow */
@@ -357,6 +358,7 @@ 
/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */

#define X86_FEATURE_AVX512_4VNNIW	(18*32+ 2) /* AVX-512 Neural Network Instructions */

#define X86_FEATURE_AVX512_4FMAPS	(18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */

#define X86_FEATURE_FSRM		(18*32+ 4) /* Fast Short Rep Mov */

#define X86_FEATURE_AVX512_VP2INTERSECT (18*32+ 8) /* AVX-512 Intersect for D/Q */

#define X86_FEATURE_MD_CLEAR		(18*32+10) /* VERW clears CPU buffers */

#define X86_FEATURE_TSX_FORCE_ABORT	(18*32+13) /* "" TSX_FORCE_ABORT */

tools/arch/x86/include/asm/disabled-features.h

+1 −7
Original line number Diff line number Diff line
@@ -10,12 +10,6 @@ 
 * cpu_feature_enabled().

 */



#ifdef CONFIG_X86_INTEL_MPX

# define DISABLE_MPX	0

#else

# define DISABLE_MPX	(1<<(X86_FEATURE_MPX & 31))

#endif



#ifdef CONFIG_X86_SMAP

# define DISABLE_SMAP	0

#else
@@ -74,7 +68,7 @@ 
#define DISABLED_MASK6	0

#define DISABLED_MASK7	(DISABLE_PTI)

#define DISABLED_MASK8	0

#define DISABLED_MASK9	(DISABLE_MPX|DISABLE_SMAP)

#define DISABLED_MASK9	(DISABLE_SMAP)

#define DISABLED_MASK10	0

#define DISABLED_MASK11	0

#define DISABLED_MASK12	0

tools/include/uapi/asm-generic/mman-common.h

+2 −0
Original line number Diff line number Diff line
@@ -11,6 +11,8 @@ 
#define PROT_WRITE	0x2		/* page can be written */

#define PROT_EXEC	0x4		/* page can be executed */

#define PROT_SEM	0x8		/* page may be used for atomic ops */

/*			0x10		   reserved for arch-specific use */

/*			0x20		   reserved for arch-specific use */

#define PROT_NONE	0x0		/* page can not be accessed */

#define PROT_GROWSDOWN	0x01000000	/* mprotect flag: extend change to start of growsdown vma */

#define PROT_GROWSUP	0x02000000	/* mprotect flag: extend change to end of growsup vma */

CRA Git | Maintained and supported by SUSTech CRA and CCSE