Commit dfa762e1 authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
Browse files

MIPS: Refactor GIC clocksource code. 



Reorganize some of the GIC clocksource driver code. Below is a list of
the various changes.

  * No longer select CSRC_GIC by default for Malta platform.
  * Limit choice for either the GIC or R4K clocksource, not both.
  * Change location in Makefile.
  * Created new 'gic_read_count' function in common 'irq-gic.c' file.
  * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function.
  * Surround GIC specific code in Malta platform code with #ifdef's.
  * Only initialize the GIC clocksource if it was selected. Original
    code called it unconditionally if a GIC was found.

Signed-off-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
parent 28ea2151

arch/mips/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -337,6 +337,7 @@ config MIPS_SEAD3 
	select BOOT_RAW

	select CEVT_R4K

	select CSRC_R4K

	select CSRC_GIC

	select CPU_MIPSR2_IRQ_VI

	select CPU_MIPSR2_IRQ_EI

	select DMA_NONCOHERENT

arch/mips/include/asm/gic.h

+4 −0
Original line number Diff line number Diff line
@@ -359,6 +359,9 @@ struct gic_shared_intr_map { 
/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */

#define GIC_PIN_TO_VEC_OFFSET	(1)



#include <linux/clocksource.h>

#include <linux/irq.h>



extern unsigned int gic_present;

extern unsigned int gic_frequency;

extern unsigned long _gic_base;
@@ -372,6 +375,7 @@ extern void gic_init(unsigned long gic_base_addr, 


extern void gic_clocksource_init(unsigned int);

extern unsigned int gic_get_int(void);

extern cycle_t gic_read_count(void);

extern void gic_send_ipi(unsigned int intr);

extern unsigned int plat_ipi_call_int_xlate(unsigned int);

extern unsigned int plat_ipi_resched_int_xlate(unsigned int);

arch/mips/kernel/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -23,11 +23,11 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o 
obj-$(CONFIG_CEVT_SB1250)	+= cevt-sb1250.o

obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o

obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o

obj-$(CONFIG_CSRC_GIC)		+= csrc-gic.o

obj-$(CONFIG_CSRC_IOASIC)	+= csrc-ioasic.o

obj-$(CONFIG_CSRC_POWERTV)	+= csrc-powertv.o

obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o

obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

obj-$(CONFIG_CSRC_GIC)		+= csrc-gic.o

obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o



obj-$(CONFIG_STACKTRACE)	+= stacktrace.o

arch/mips/kernel/csrc-gic.c

+2 −11
Original line number Diff line number Diff line
@@ -5,23 +5,14 @@ 
 *

 * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.

 */

#include <linux/clocksource.h>

#include <linux/init.h>

#include <linux/time.h>



#include <asm/time.h>

#include <asm/gic.h>



static cycle_t gic_hpt_read(struct clocksource *cs)

{

	unsigned int hi, hi2, lo;



	do {

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), lo);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi2);

	} while (hi2 != hi);



	return (((cycle_t) hi) << 32) + lo;

	return gic_read_count();

}



static struct clocksource gic_clocksource = {

arch/mips/kernel/irq-gic.c

+16 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/init.h>

#include <linux/smp.h>

#include <linux/irq.h>

#include <linux/clocksource.h>



#include <asm/io.h>

#include <asm/gic.h>
@@ -32,6 +33,21 @@ static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; 
static struct gic_pending_regs pending_regs[NR_CPUS];

static struct gic_intrmask_regs intrmask_regs[NR_CPUS];



#ifdef CONFIG_CSRC_GIC

cycle_t gic_read_count(void)

{

	unsigned int hi, hi2, lo;



	do {

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), lo);

		GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi2);

	} while (hi2 != hi);



	return (((cycle_t) hi) << 32) + lo;

}

#endif



unsigned int gic_get_timer_pending(void)

{

	unsigned int vpe_pending;

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