Commit df857416 authored by Mark Rutland's avatar Mark Rutland Committed by Catalin Marinas
Browse files

arm64: cpuinfo: record cpu system register values 



Several kernel subsystems need to know details about CPU system register
values, sometimes for CPUs other than that they are executing on. Rather
than hard-coding system register accesses and cross-calls for these
cases, this patch adds logic to record various system register values at
boot-time. This may be used for feature reporting, firmware bug
detection, etc.

Separate hooks are added for the boot and hotplug paths to enable
one-time intialisation and cold/warm boot value mismatch detection in
later patches.

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 89c4a306

arch/arm64/include/asm/cpu.h

0 → 100644
+59 −0
Original line number Diff line number Diff line 
/*

  * Copyright (C) 2014 ARM Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef __ASM_CPU_H

#define __ASM_CPU_H



#include <linux/cpu.h>

#include <linux/init.h>

#include <linux/percpu.h>



/*

 * Records attributes of an individual CPU.

 */

struct cpuinfo_arm64 {

	struct cpu	cpu;

	u32		reg_ctr;

	u32		reg_cntfrq;

	u32		reg_dczid;

	u32		reg_midr;



	u64		reg_id_aa64isar0;

	u64		reg_id_aa64isar1;

	u64		reg_id_aa64mmfr0;

	u64		reg_id_aa64mmfr1;

	u64		reg_id_aa64pfr0;

	u64		reg_id_aa64pfr1;



	u32		reg_id_isar0;

	u32		reg_id_isar1;

	u32		reg_id_isar2;

	u32		reg_id_isar3;

	u32		reg_id_isar4;

	u32		reg_id_isar5;

	u32		reg_id_mmfr0;

	u32		reg_id_mmfr1;

	u32		reg_id_mmfr2;

	u32		reg_id_mmfr3;

	u32		reg_id_pfr0;

	u32		reg_id_pfr1;

};



DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);



void cpuinfo_store_cpu(void);

void __init cpuinfo_store_boot_cpu(void);



#endif /* __ASM_CPU_H */

arch/arm64/kernel/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -15,7 +15,8 @@ CFLAGS_REMOVE_return_address.o = -pg 
arm64-obj-y		:= cputable.o debug-monitors.o entry.o irq.o fpsimd.o	\

			   entry-fpsimd.o process.o ptrace.o setup.o signal.o	\

			   sys.o stacktrace.o time.o traps.o io.o vdso.o	\

			   hyp-stub.o psci.o cpu_ops.o insn.o return_address.o

			   hyp-stub.o psci.o cpu_ops.o insn.o return_address.o	\

			   cpuinfo.o



arm64-obj-$(CONFIG_COMPAT)		+= sys32.o kuser32.o signal32.o 	\

					   sys_compat.o

arch/arm64/kernel/cpuinfo.c

0 → 100644
+73 −0
Original line number Diff line number Diff line 
/*

 * Record and handle CPU attributes.

 *

 * Copyright (C) 2014 ARM Ltd.

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#include <asm/arch_timer.h>

#include <asm/cachetype.h>

#include <asm/cpu.h>

#include <asm/cputype.h>



#include <linux/init.h>

#include <linux/smp.h>



/*

 * In case the boot CPU is hotpluggable, we record its initial state and

 * current state separately. Certain system registers may contain different

 * values depending on configuration at or after reset.

 */

DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data);

static struct cpuinfo_arm64 boot_cpu_data;



static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)

{

	info->reg_cntfrq = arch_timer_get_cntfrq();

	info->reg_ctr = read_cpuid_cachetype();

	info->reg_dczid = read_cpuid(DCZID_EL0);

	info->reg_midr = read_cpuid_id();



	info->reg_id_aa64isar0 = read_cpuid(ID_AA64ISAR0_EL1);

	info->reg_id_aa64isar1 = read_cpuid(ID_AA64ISAR1_EL1);

	info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);

	info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);

	info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);

	info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);



	info->reg_id_isar0 = read_cpuid(ID_ISAR0_EL1);

	info->reg_id_isar1 = read_cpuid(ID_ISAR1_EL1);

	info->reg_id_isar2 = read_cpuid(ID_ISAR2_EL1);

	info->reg_id_isar3 = read_cpuid(ID_ISAR3_EL1);

	info->reg_id_isar4 = read_cpuid(ID_ISAR4_EL1);

	info->reg_id_isar5 = read_cpuid(ID_ISAR5_EL1);

	info->reg_id_mmfr0 = read_cpuid(ID_MMFR0_EL1);

	info->reg_id_mmfr1 = read_cpuid(ID_MMFR1_EL1);

	info->reg_id_mmfr2 = read_cpuid(ID_MMFR2_EL1);

	info->reg_id_mmfr3 = read_cpuid(ID_MMFR3_EL1);

	info->reg_id_pfr0 = read_cpuid(ID_PFR0_EL1);

	info->reg_id_pfr1 = read_cpuid(ID_PFR1_EL1);

}



void cpuinfo_store_cpu(void)

{

	struct cpuinfo_arm64 *info = this_cpu_ptr(&cpu_data);

	__cpuinfo_store_cpu(info);

}



void __init cpuinfo_store_boot_cpu(void)

{

	struct cpuinfo_arm64 *info = &per_cpu(cpu_data, 0);

	__cpuinfo_store_cpu(info);



	boot_cpu_data = *info;

}

arch/arm64/kernel/setup.c

+4 −3
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ 
#include <linux/efi.h>



#include <asm/fixmap.h>

#include <asm/cpu.h>

#include <asm/cputype.h>

#include <asm/elf.h>

#include <asm/cputable.h>
@@ -219,6 +220,8 @@ static void __init setup_processor(void) 
	sprintf(init_utsname()->machine, ELF_PLATFORM);

	elf_hwcap = 0;



	cpuinfo_store_boot_cpu();



	/*

	 * Check for sane CTR_EL0.CWG value.

	 */
@@ -417,14 +420,12 @@ static int __init arm64_device_init(void) 
}

arch_initcall_sync(arm64_device_init);



static DEFINE_PER_CPU(struct cpu, cpu_data);



static int __init topology_init(void)

{

	int i;



	for_each_possible_cpu(i) {

		struct cpu *cpu = &per_cpu(cpu_data, i);

		struct cpu *cpu = &per_cpu(cpu_data.cpu, i);

		cpu->hotpluggable = 1;

		register_cpu(cpu, i);

	}

arch/arm64/kernel/smp.c

+6 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 


#include <asm/atomic.h>

#include <asm/cacheflush.h>

#include <asm/cpu.h>

#include <asm/cputype.h>

#include <asm/cpu_ops.h>

#include <asm/mmu_context.h>
@@ -154,6 +155,11 @@ asmlinkage void secondary_start_kernel(void) 
	if (cpu_ops[cpu]->cpu_postboot)

		cpu_ops[cpu]->cpu_postboot();



	/*

	 * Log the CPU info before it is marked online and might get read.

	 */

	cpuinfo_store_cpu();



	/*

	 * Enable GIC and timers.

	 */

CRA Git | Maintained and supported by SUSTech CRA and CCSE