Commit df687341 authored by Maxime Ripard's avatar Maxime Ripard Committed by Kishon Vijay Abraham I
Browse files

dt-bindings: phy: Move the Cadence D-PHY bindings



The Cadence D-PHY bindings was defined as part of the DSI block so far.
However, since it's now going to be a separate driver, we need to move the
binding to a file of its own.

Acked-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 1baafbe4
Loading
Loading
Loading
Loading
+0 −21
Original line number Diff line number Diff line
@@ -31,28 +31,7 @@ Required subnodes:
- one subnode per DSI device connected on the DSI bus. Each DSI device should
  contain a reg property encoding its virtual channel.

Cadence DPHY
============

Cadence DPHY block.

Required properties:
- compatible: should be set to "cdns,dphy".
- reg: physical base address and length of the DPHY registers.
- clocks: DPHY reference clocks.
- clock-names: must contain "psm" and "pll_ref".
- #phy-cells: must be set to 0.


Example:
	dphy0: dphy@fd0e0000{
		compatible = "cdns,dphy";
		reg = <0x0 0xfd0e0000 0x0 0x1000>;
		clocks = <&psm_clk>, <&pll_ref_clk>;
		clock-names = "psm", "pll_ref";
		#phy-cells = <0>;
	};

	dsi0: dsi@fd0c0000 {
		compatible = "cdns,dsi";
		reg = <0x0 0xfd0c0000 0x0 0x1000>;
+20 −0
Original line number Diff line number Diff line
Cadence DPHY
============

Cadence DPHY block.

Required properties:
- compatible: should be set to "cdns,dphy".
- reg: physical base address and length of the DPHY registers.
- clocks: DPHY reference clocks.
- clock-names: must contain "psm" and "pll_ref".
- #phy-cells: must be set to 0.

Example:
	dphy0: dphy@fd0e0000{
		compatible = "cdns,dphy";
		reg = <0x0 0xfd0e0000 0x0 0x1000>;
		clocks = <&psm_clk>, <&pll_ref_clk>;
		clock-names = "psm", "pll_ref";
		#phy-cells = <0>;
	};