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The Armada SoC family implementation of this SPI hardware module has extended the configuration register to allow for a wider range of SPI clock rates. Specifically the Serial Baud Rate Pre-selection bits in the SPI Interface Configuration Register now also use bits 6 and 7 as well. Modify the baud rate calculation to handle these differences for the Armada case. Potentially a baud rate can be setup using a number of different pre-scalar and scalar combinations. This code tries all possible pre-scalar divisors (8 in total) to try and find the most accurate set. This change introduces (and documents) a new device tree compatible device name "armada-370-spi" to support this. Signed-off-by:Greg Ungerer <gerg@uclinux.org> Tested-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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