bus: ti-sysc: drop the extra hardreset during init

	return error;

}

/**

 * sysc_rstctrl_reset_deassert - deassert rstctrl reset

 * @ddata: device driver data

 * @reset: reset before deassert

 *

 * A module can have both OCP softreset control and external rstctrl.

 * If more complicated rstctrl resets are needed, please handle these

 * directly from the child device driver and map only the module reset

 * for the parent interconnect target module device.

 *

 * Automatic reset of the module on init can be skipped with the

 * "ti,no-reset-on-init" device tree property.

 */

static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)

{

	int error;

	if (!ddata->rsts)

		return 0;

	if (reset) {

		error = reset_control_assert(ddata->rsts);

		if (error)

			return error;

	}

	reset_control_deassert(ddata->rsts);

	return 0;

}

/*

 * Note that the caller must ensure the interconnect target module is enabled

 * before calling reset. Otherwise reset will not complete.

	int error = 0;

	bool manage_clocks = true;

	error = sysc_rstctrl_reset_deassert(ddata, false);

	if (error)

		return error;

	if (ddata->cfg.quirks &

	    (SYSC_QUIRK_NO_IDLE | SYSC_QUIRK_NO_IDLE_ON_INIT))

		manage_clocks = false;

		goto err_opt_clocks;

	if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) {

		error = sysc_rstctrl_reset_deassert(ddata, true);

		error = reset_control_deassert(ddata->rsts);

		if (error)

			goto err_main_clocks;

	}