Commit df3c8517 authored Apr 21, 2011 by Kevin Hilman

gpio/omap: _clear_gpio_irqbank: fix flushing of posted write



In commit 78a1a6d3 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.

Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.

Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.

Signed-off-by: Kevin Hilman <khilman@ti.com>

parent 2c53b436

drivers/gpio/gpio-omap.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -700,13 +700,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
		else if (cpu_is_omap44xx())
		reg = bank->base + OMAP4_GPIO_IRQSTATUS1;

		if (cpu_is_omap24xx() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		if (cpu_is_omap24xx() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx())
		__raw_writel(gpio_mask, reg);

		/* Flush posted write for the irq status to avoid spurious interrupts */
		__raw_readl(reg);
		}
		}

		static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
		{

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