Commit dee43f7a authored by Michael Straube's avatar Michael Straube Committed by Greg Kroah-Hartman
Browse files

staging: rtl8188eu: remove get_right_chnl_for_iqk() 



The function get_right_chnl_for_iqk() only returns non zero values for
channels > 14. According to the TODO, code valid only for 5 GHz should
be removed.

- find and remove remaining code valid only for 5 GHz. Most of the obvious
  ones have been removed, but things like channel > 14 still exist.

Remove get_right_chnl_for_iqk() and the variable chn_index that is
used to save the return value. Replace the uses of chn_index with zero.

Remove the now unused define ODM_TARGET_CHNL_NUM_2G_5G.

Signed-off-by: default avatarMichael Straube <straube.linux@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 71c29144

drivers/staging/rtl8188eu/hal/phy.c

+3 −24
Original line number Diff line number Diff line
@@ -298,25 +298,6 @@ void rtw_hal_set_chan(struct adapter *adapt, u8 channel) 


#define ODM_TXPWRTRACK_MAX_IDX_88E  6



static u8 get_right_chnl_for_iqk(u8 chnl)

{

	u8 place;

	u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {

		36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,

		100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,

		124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,

		155, 157, 159, 161, 163, 165

	};



	if (chnl > 14) {

		for (place = 0; place < sizeof(channel_all); place++) {

			if (channel_all[place] == chnl)

				return ++place;

		}

	}

	return 0;

}



void rtl88eu_dm_txpower_track_adjust(struct odm_dm_struct *dm_odm, u8 type,

				     u8 *direction, u32 *out_write_val)

{
@@ -1215,7 +1196,7 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) 
{

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;

	s32 result[4][8];

	u8 i, final, chn_index;

	u8 i, final;

	bool pathaok, pathbok;

	s32 reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc, reg_ec4;

	bool is12simular, is13simular, is23simular;
@@ -1324,12 +1305,10 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) 
				       (reg_ec4 == 0));

	}



	chn_index = get_right_chnl_for_iqk(adapt->HalData->CurrentChannel);



	if (final < 4) {

		for (i = 0; i < IQK_Matrix_REG_NUM; i++)

			dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[chn_index].Value[0][i] = result[final][i];

		dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[chn_index].bIQKDone = true;

			dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final][i];

		dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true;

	}



	save_adda_registers(adapt, iqk_bb_reg_92c,

drivers/staging/rtl8188eu/include/phy.h

+0 −1
Original line number Diff line number Diff line
@@ -4,7 +4,6 @@ 
#define IQK_DELAY_TIME_88E	    10

#define index_mapping_NUM_88E	    15

#define AVG_THERMAL_NUM_88E	    4

#define ODM_TARGET_CHNL_NUM_2G_5G   59



bool rtl88eu_phy_mac_config(struct adapter *adapt);

bool rtl88eu_phy_rf_config(struct adapter *adapt);

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