Commit dee23837 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev 

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: (29 commits)
  libata: implement EH fast drain
  libata: schedule probing after SError access failure during autopsy
  libata: clear HOTPLUG flag after a reset
  libata: reorganize ata_ehi_hotplugged()
  libata: improve SCSI scan failure handling
  libata: quickly trigger SATA SPD down after debouncing failed
  libata: improve SATA PHY speed down logic
  The SATA controller device ID is different according to
  ahci: implement SCR_NOTIFICATION r/w
  ahci: make NO_NCQ handling more consistent
  libata: make ->scr_read/write callbacks return error code
  libata: implement AC_ERR_NCQ
  libata: improve EH report formatting
  sata_sil24: separate out sil24_do_softreset()
  sata_sil24: separate out sil24_exec_polled_cmd()
  sata_sil24: replace sil24_update_tf() with sil24_read_tf()
  ahci: separate out ahci_do_softreset()
  ahci: separate out ahci_exec_polled_cmd()
  ahci: separate out ahci_kick_engine()
  ahci: use deadline instead of fixed timeout for 1st FIS for SRST
  ...
parents e609ccc3 5ddf24c5

drivers/ata/ahci.c

+149 −106
Original line number Diff line number Diff line
@@ -99,6 +99,7 @@ enum { 
	HOST_CAP_SSC		= (1 << 14), /* Slumber capable */

	HOST_CAP_CLO		= (1 << 24), /* Command List Override support */

	HOST_CAP_SSS		= (1 << 27), /* Staggered Spin-up */

	HOST_CAP_SNTF		= (1 << 29), /* SNotification register */

	HOST_CAP_NCQ		= (1 << 30), /* Native Command Queueing */

	HOST_CAP_64		= (1 << 31), /* PCI DAC (64-bit DMA) support */
@@ -113,11 +114,11 @@ enum { 
	PORT_TFDATA		= 0x20,	/* taskfile data */

	PORT_SIG		= 0x24,	/* device TF signature */

	PORT_CMD_ISSUE		= 0x38, /* command issue */

	PORT_SCR		= 0x28, /* SATA phy register block */

	PORT_SCR_STAT		= 0x28, /* SATA phy register: SStatus */

	PORT_SCR_CTL		= 0x2c, /* SATA phy register: SControl */

	PORT_SCR_ERR		= 0x30, /* SATA phy register: SError */

	PORT_SCR_ACT		= 0x34, /* SATA phy register: SActive */

	PORT_SCR_NTF		= 0x3c, /* SATA phy register: SNotification */



	/* PORT_IRQ_{STAT,MASK} bits */

	PORT_IRQ_COLD_PRES	= (1 << 31), /* cold presence detect */
@@ -216,8 +217,8 @@ struct ahci_port_priv { 
	unsigned int		ncq_saw_sdb:1;

};



static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);

static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);

static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);

static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);

static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);

static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);

static void ahci_irq_clear(struct ata_port *ap);
@@ -417,7 +418,10 @@ static const struct pci_device_id ahci_pci_tbl[] = { 


	/* ATI */

	{ PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */

	{ PCI_VDEVICE(ATI, 0x4390), board_ahci_sb600 }, /* ATI SB700 */

	{ PCI_VDEVICE(ATI, 0x4390), board_ahci_sb600 }, /* ATI SB700 IDE */

	{ PCI_VDEVICE(ATI, 0x4391), board_ahci_sb600 }, /* ATI SB700 AHCI */

	{ PCI_VDEVICE(ATI, 0x4392), board_ahci_sb600 }, /* ATI SB700 nraid5 */

	{ PCI_VDEVICE(ATI, 0x4393), board_ahci_sb600 }, /* ATI SB700 raid5 */



	/* VIA */

	{ PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */
@@ -545,13 +549,19 @@ static void ahci_save_initial_config(struct pci_dev *pdev, 
	hpriv->saved_cap = cap = readl(mmio + HOST_CAP);

	hpriv->saved_port_map = port_map = readl(mmio + HOST_PORTS_IMPL);



	/* some chips lie about 64bit support */

	/* some chips have errata preventing 64bit use */

	if ((cap & HOST_CAP_64) && (pi->flags & AHCI_FLAG_32BIT_ONLY)) {

		dev_printk(KERN_INFO, &pdev->dev,

			   "controller can't do 64bit DMA, forcing 32bit\n");

		cap &= ~HOST_CAP_64;

	}



	if ((cap & HOST_CAP_NCQ) && (pi->flags & AHCI_FLAG_NO_NCQ)) {

		dev_printk(KERN_INFO, &pdev->dev,

			   "controller can't do NCQ, turning off CAP_NCQ\n");

		cap &= ~HOST_CAP_NCQ;

	}



	/* fixup zero port_map */

	if (!port_map) {

		port_map = (1 << ahci_nr_ports(cap)) - 1;
@@ -625,38 +635,45 @@ static void ahci_restore_initial_config(struct ata_host *host) 
	(void) readl(mmio + HOST_PORTS_IMPL);	/* flush */

}



static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in)

static unsigned ahci_scr_offset(struct ata_port *ap, unsigned int sc_reg)

{

	unsigned int sc_reg;

	static const int offset[] = {

		[SCR_STATUS]		= PORT_SCR_STAT,

		[SCR_CONTROL]		= PORT_SCR_CTL,

		[SCR_ERROR]		= PORT_SCR_ERR,

		[SCR_ACTIVE]		= PORT_SCR_ACT,

		[SCR_NOTIFICATION]	= PORT_SCR_NTF,

	};

	struct ahci_host_priv *hpriv = ap->host->private_data;



	switch (sc_reg_in) {

	case SCR_STATUS:	sc_reg = 0; break;

	case SCR_CONTROL:	sc_reg = 1; break;

	case SCR_ERROR:		sc_reg = 2; break;

	case SCR_ACTIVE:	sc_reg = 3; break;

	default:

		return 0xffffffffU;

	if (sc_reg < ARRAY_SIZE(offset) &&

	    (sc_reg != SCR_NOTIFICATION || (hpriv->cap & HOST_CAP_SNTF)))

		return offset[sc_reg];

	return 0;

}



	return readl(ap->ioaddr.scr_addr + (sc_reg * 4));

}

static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)

{

	void __iomem *port_mmio = ahci_port_base(ap);

	int offset = ahci_scr_offset(ap, sc_reg);



	if (offset) {

		*val = readl(port_mmio + offset);

		return 0;

	}

	return -EINVAL;

}



static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,

			       u32 val)

static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)

{

	unsigned int sc_reg;



	switch (sc_reg_in) {

	case SCR_STATUS:	sc_reg = 0; break;

	case SCR_CONTROL:	sc_reg = 1; break;

	case SCR_ERROR:		sc_reg = 2; break;

	case SCR_ACTIVE:	sc_reg = 3; break;

	default:

		return;

	}

	void __iomem *port_mmio = ahci_port_base(ap);

	int offset = ahci_scr_offset(ap, sc_reg);



	writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));

	if (offset) {

		writel(val, port_mmio + offset);

		return 0;

	}

	return -EINVAL;

}



static void ahci_start_engine(struct ata_port *ap)
@@ -948,37 +965,87 @@ static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag, 
	pp->cmd_slot[tag].tbl_addr_hi = cpu_to_le32((cmd_tbl_dma >> 16) >> 16);

}



static int ahci_clo(struct ata_port *ap)

static int ahci_kick_engine(struct ata_port *ap, int force_restart)

{

	void __iomem *port_mmio = ap->ioaddr.cmd_addr;

	struct ahci_host_priv *hpriv = ap->host->private_data;

	u32 tmp;

	int busy, rc;



	/* do we need to kick the port? */

	busy = ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ);

	if (!busy && !force_restart)

		return 0;



	/* stop engine */

	rc = ahci_stop_engine(ap);

	if (rc)

		goto out_restart;



	/* need to do CLO? */

	if (!busy) {

		rc = 0;

		goto out_restart;

	}



	if (!(hpriv->cap & HOST_CAP_CLO))

		return -EOPNOTSUPP;

	if (!(hpriv->cap & HOST_CAP_CLO)) {

		rc = -EOPNOTSUPP;

		goto out_restart;

	}



	/* perform CLO */

	tmp = readl(port_mmio + PORT_CMD);

	tmp |= PORT_CMD_CLO;

	writel(tmp, port_mmio + PORT_CMD);



	rc = 0;

	tmp = ata_wait_register(port_mmio + PORT_CMD,

				PORT_CMD_CLO, PORT_CMD_CLO, 1, 500);

	if (tmp & PORT_CMD_CLO)

		return -EIO;

		rc = -EIO;



	return 0;

	/* restart engine */

 out_restart:

	ahci_start_engine(ap);

	return rc;

}



static int ahci_softreset(struct ata_port *ap, unsigned int *class,

			  unsigned long deadline)

static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,

				struct ata_taskfile *tf, int is_cmd, u16 flags,

				unsigned long timeout_msec)

{

	const u32 cmd_fis_len = 5; /* five dwords */

	struct ahci_port_priv *pp = ap->private_data;

	void __iomem *port_mmio = ahci_port_base(ap);

	const u32 cmd_fis_len = 5; /* five dwords */

	u8 *fis = pp->cmd_tbl;

	u32 tmp;



	/* prep the command */

	ata_tf_to_fis(tf, pmp, is_cmd, fis);

	ahci_fill_cmd_slot(pp, 0, cmd_fis_len | flags | (pmp << 12));



	/* issue & wait */

	writel(1, port_mmio + PORT_CMD_ISSUE);



	if (timeout_msec) {

		tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1,

					1, timeout_msec);

		if (tmp & 0x1) {

			ahci_kick_engine(ap, 1);

			return -EBUSY;

		}

	} else

		readl(port_mmio + PORT_CMD_ISSUE);	/* flush */



	return 0;

}



static int ahci_do_softreset(struct ata_port *ap, unsigned int *class,

			     int pmp, unsigned long deadline)

{

	const char *reason = NULL;

	unsigned long now, msecs;

	struct ata_taskfile tf;

	u32 tmp;

	u8 *fis;

	int rc;



	DPRINTK("ENTER\n");
@@ -990,43 +1057,22 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class, 
	}



	/* prepare for SRST (AHCI-1.1 10.4.1) */

	rc = ahci_stop_engine(ap);

	if (rc) {

		reason = "failed to stop engine";

		goto fail_restart;

	}



	/* check BUSY/DRQ, perform Command List Override if necessary */

	if (ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ)) {

		rc = ahci_clo(ap);



		if (rc == -EOPNOTSUPP) {

			reason = "port busy but CLO unavailable";

			goto fail_restart;

		} else if (rc) {

			reason = "port busy but CLO failed";

			goto fail_restart;

		}

	}



	/* restart engine */

	ahci_start_engine(ap);

	rc = ahci_kick_engine(ap, 1);

	if (rc)

		ata_port_printk(ap, KERN_WARNING,

				"failed to reset engine (errno=%d)", rc);



	ata_tf_init(ap->device, &tf);

	fis = pp->cmd_tbl;



	/* issue the first D2H Register FIS */

	ahci_fill_cmd_slot(pp, 0,

			   cmd_fis_len | AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY);

	msecs = 0;

	now = jiffies;

	if (time_after(now, deadline))

		msecs = jiffies_to_msecs(deadline - now);



	tf.ctl |= ATA_SRST;

	ata_tf_to_fis(&tf, fis, 0);

	fis[1] &= ~(1 << 7);	/* turn off Command FIS bit */



	writel(1, port_mmio + PORT_CMD_ISSUE);



	tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1, 1, 500);

	if (tmp & 0x1) {

	if (ahci_exec_polled_cmd(ap, pmp, &tf, 0,

				 AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs)) {

		rc = -EIO;

		reason = "1st FIS failed";

		goto fail;
@@ -1036,14 +1082,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class, 
	msleep(1);



	/* issue the second D2H Register FIS */

	ahci_fill_cmd_slot(pp, 0, cmd_fis_len);



	tf.ctl &= ~ATA_SRST;

	ata_tf_to_fis(&tf, fis, 0);

	fis[1] &= ~(1 << 7);	/* turn off Command FIS bit */



	writel(1, port_mmio + PORT_CMD_ISSUE);

	readl(port_mmio + PORT_CMD_ISSUE);	/* flush */

	ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);



	/* spec mandates ">= 2ms" before checking status.

	 * We wait 150ms, because that was the magic delay used for
@@ -1066,13 +1106,17 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class, 
	DPRINTK("EXIT, class=%u\n", *class);

	return 0;



 fail_restart:

	ahci_start_engine(ap);

 fail:

	ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason);

	return rc;

}



static int ahci_softreset(struct ata_port *ap, unsigned int *class,

			  unsigned long deadline)

{

	return ahci_do_softreset(ap, class, 0, deadline);

}



static int ahci_hardreset(struct ata_port *ap, unsigned int *class,

			  unsigned long deadline)

{
@@ -1088,7 +1132,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class, 
	/* clear D2H reception area to properly wait for D2H FIS */

	ata_tf_init(ap->device, &tf);

	tf.command = 0x80;

	ata_tf_to_fis(&tf, d2h_fis, 0);

	ata_tf_to_fis(&tf, 0, 0, d2h_fis);



	rc = sata_std_hardreset(ap, class, deadline);
@@ -1106,6 +1150,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class, 
static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class,

				 unsigned long deadline)

{

	u32 serror;

	int rc;



	DPRINTK("ENTER\n");
@@ -1116,7 +1161,8 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class, 
				 deadline);



	/* vt8251 needs SError cleared for the port to operate */

	ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR));

	ahci_scr_read(ap, SCR_ERROR, &serror);

	ahci_scr_write(ap, SCR_ERROR, serror);



	ahci_start_engine(ap);
@@ -1205,7 +1251,7 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc) 
	 */

	cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ;



	ata_tf_to_fis(&qc->tf, cmd_tbl, 0);

	ata_tf_to_fis(&qc->tf, 0, 1, cmd_tbl);

	if (is_atapi) {

		memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);

		memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
@@ -1238,7 +1284,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 
	ata_ehi_clear_desc(ehi);



	/* AHCI needs SError cleared; otherwise, it might lock up */

	serror = ahci_scr_read(ap, SCR_ERROR);

	ahci_scr_read(ap, SCR_ERROR, &serror);

	ahci_scr_write(ap, SCR_ERROR, serror);



	/* analyze @irq_stat */
@@ -1262,12 +1308,12 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 
	if (irq_stat & PORT_IRQ_IF_ERR) {

		err_mask |= AC_ERR_ATA_BUS;

		action |= ATA_EH_SOFTRESET;

		ata_ehi_push_desc(ehi, ", interface fatal error");

		ata_ehi_push_desc(ehi, "interface fatal error");

	}



	if (irq_stat & (PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)) {

		ata_ehi_hotplugged(ehi);

		ata_ehi_push_desc(ehi, ", %s", irq_stat & PORT_IRQ_CONNECT ?

		ata_ehi_push_desc(ehi, "%s", irq_stat & PORT_IRQ_CONNECT ?

			"connection status changed" : "PHY RDY changed");

	}
@@ -1276,7 +1322,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 


		err_mask |= AC_ERR_HSM;

		action |= ATA_EH_SOFTRESET;

		ata_ehi_push_desc(ehi, ", unknown FIS %08x %08x %08x %08x",

		ata_ehi_push_desc(ehi, "unknown FIS %08x %08x %08x %08x",

				  unk[0], unk[1], unk[2], unk[3]);

	}
@@ -1512,11 +1558,17 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) 
{

	struct ata_port *ap = qc->ap;



	if (qc->flags & ATA_QCFLAG_FAILED) {

	/* make DMA engine forget about the failed command */

		ahci_stop_engine(ap);

		ahci_start_engine(ap);

	if (qc->flags & ATA_QCFLAG_FAILED)

		ahci_kick_engine(ap, 1);

}



static int ahci_port_resume(struct ata_port *ap)

{

	ahci_power_up(ap);

	ahci_start_port(ap);



	return 0;

}



#ifdef CONFIG_PM
@@ -1536,14 +1588,6 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) 
	return rc;

}



static int ahci_port_resume(struct ata_port *ap)

{

	ahci_power_up(ap);

	ahci_start_port(ap);



	return 0;

}



static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)

{

	struct ata_host *host = dev_get_drvdata(&pdev->dev);
@@ -1734,12 +1778,13 @@ static void ahci_print_info(struct ata_host *host) 


	dev_printk(KERN_INFO, &pdev->dev,

		"flags: "

	       	"%s%s%s%s%s%s"

		"%s%s%s%s%s%s%s"

		"%s%s%s%s%s%s%s\n"

	       	,



		cap & (1 << 31) ? "64bit " : "",

		cap & (1 << 30) ? "ncq " : "",

		cap & (1 << 29) ? "sntf " : "",

		cap & (1 << 28) ? "ilck " : "",

		cap & (1 << 27) ? "stag " : "",

		cap & (1 << 26) ? "pm " : "",
@@ -1794,7 +1839,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	ahci_save_initial_config(pdev, &pi, hpriv);



	/* prepare host */

	if (!(pi.flags & AHCI_FLAG_NO_NCQ) && (hpriv->cap & HOST_CAP_NCQ))

	if (hpriv->cap & HOST_CAP_NCQ)

		pi.flags |= ATA_FLAG_NCQ;



	host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map));
@@ -1808,10 +1853,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
		void __iomem *port_mmio = ahci_port_base(ap);



		/* standard SATA port setup */

		if (hpriv->port_map & (1 << i)) {

		if (hpriv->port_map & (1 << i))

			ap->ioaddr.cmd_addr = port_mmio;

			ap->ioaddr.scr_addr = port_mmio + PORT_SCR;

		}



		/* disabled/not-implemented port */

		else

drivers/ata/libata-core.c

+52 −27
Original line number Diff line number Diff line
@@ -111,8 +111,9 @@ MODULE_VERSION(DRV_VERSION); 
/**

 *	ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure

 *	@tf: Taskfile to convert

 *	@fis: Buffer into which data will output

 *	@pmp: Port multiplier port

 *	@is_cmd: This FIS is for command

 *	@fis: Buffer into which data will output

 *

 *	Converts a standard ATA taskfile to a Serial ATA

 *	FIS structure (Register - Host to Device).
@@ -120,12 +121,13 @@ MODULE_VERSION(DRV_VERSION); 
 *	LOCKING:

 *	Inherited from caller.

 */



void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)

void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)

{

	fis[0] = 0x27;			/* Register - Host to Device FIS */

	fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,

					    bit 7 indicates Command FIS */

	fis[1] = pmp & 0xf;		/* Port multiplier number*/

	if (is_cmd)

		fis[1] |= (1 << 7);	/* bit 7 indicates Command FIS */



	fis[2] = tf->command;

	fis[3] = tf->feature;
@@ -2387,21 +2389,35 @@ int sata_down_spd_limit(struct ata_port *ap) 
	u32 sstatus, spd, mask;

	int rc, highbit;



	if (!sata_scr_valid(ap))

		return -EOPNOTSUPP;



	/* If SCR can be read, use it to determine the current SPD.

	 * If not, use cached value in ap->sata_spd.

	 */

	rc = sata_scr_read(ap, SCR_STATUS, &sstatus);

	if (rc)

		return rc;

	if (rc == 0)

		spd = (sstatus >> 4) & 0xf;

	else

		spd = ap->sata_spd;



	mask = ap->sata_spd_limit;

	if (mask <= 1)

		return -EINVAL;



	/* unconditionally mask off the highest bit */

	highbit = fls(mask) - 1;

	mask &= ~(1 << highbit);



	spd = (sstatus >> 4) & 0xf;

	if (spd <= 1)

		return -EINVAL;

	spd--;

	mask &= (1 << spd) - 1;

	/* Mask off all speeds higher than or equal to the current

	 * one.  Force 1.5Gbps if current SPD is not available.

	 */

	if (spd > 1)

		mask &= (1 << (spd - 1)) - 1;

	else

		mask &= 1;



	/* were we already at the bottom? */

	if (!mask)

		return -EINVAL;
@@ -3251,9 +3267,11 @@ int sata_phy_debounce(struct ata_port *ap, const unsigned long *params, 
		last = cur;

		last_jiffies = jiffies;



		/* check deadline */

		/* Check deadline.  If debouncing failed, return

		 * -EPIPE to tell upper layer to lower link speed.

		 */

		if (time_after(jiffies, deadline))

			return -EBUSY;

			return -EPIPE;

	}

}
@@ -3769,6 +3787,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { 
	{ "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },

	{ "WDC WD740ADFD-00NLR1", NULL,		ATA_HORKAGE_NONCQ, },

	{ "FUJITSU MHV2080BH",	"00840028",	ATA_HORKAGE_NONCQ, },

	{ "ST9160821AS",	"3.CLF",	ATA_HORKAGE_NONCQ, },



	/* Devices with NCQ limits */
@@ -5729,10 +5748,8 @@ int sata_scr_valid(struct ata_port *ap) 
 */

int sata_scr_read(struct ata_port *ap, int reg, u32 *val)

{

	if (sata_scr_valid(ap)) {

		*val = ap->ops->scr_read(ap, reg);

		return 0;

	}

	if (sata_scr_valid(ap))

		return ap->ops->scr_read(ap, reg, val);

	return -EOPNOTSUPP;

}
@@ -5754,10 +5771,8 @@ int sata_scr_read(struct ata_port *ap, int reg, u32 *val) 
 */

int sata_scr_write(struct ata_port *ap, int reg, u32 val)

{

	if (sata_scr_valid(ap)) {

		ap->ops->scr_write(ap, reg, val);

		return 0;

	}

	if (sata_scr_valid(ap))

		return ap->ops->scr_write(ap, reg, val);

	return -EOPNOTSUPP;

}
@@ -5778,10 +5793,13 @@ int sata_scr_write(struct ata_port *ap, int reg, u32 val) 
 */

int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)

{

	int rc;



	if (sata_scr_valid(ap)) {

		ap->ops->scr_write(ap, reg, val);

		ap->ops->scr_read(ap, reg);

		return 0;

		rc = ap->ops->scr_write(ap, reg, val);

		if (rc == 0)

			rc = ap->ops->scr_read(ap, reg, &val);

		return rc;

	}

	return -EOPNOTSUPP;

}
@@ -5993,6 +6011,7 @@ void ata_dev_init(struct ata_device *dev) 


	/* SATA spd limit is bound to the first device */

	ap->sata_spd_limit = ap->hw_sata_spd_limit;

	ap->sata_spd = 0;



	/* High bits of dev->flags are used to record warm plug

	 * requests which occur asynchronously.  Synchronize using
@@ -6058,6 +6077,9 @@ struct ata_port *ata_port_alloc(struct ata_host *host) 
	INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);

	INIT_LIST_HEAD(&ap->eh_done_q);

	init_waitqueue_head(&ap->eh_wait_q);

	init_timer_deferrable(&ap->fastdrain_timer);

	ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;

	ap->fastdrain_timer.data = (unsigned long)ap;



	ap->cbl = ATA_CBL_NONE;
@@ -6434,7 +6456,7 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 
	for (i = 0; i < host->n_ports; i++) {

		struct ata_port *ap = host->ports[i];



		ata_scsi_scan_host(ap);

		ata_scsi_scan_host(ap, 1);

	}



	return 0;
@@ -6942,6 +6964,9 @@ EXPORT_SYMBOL_GPL(ata_pci_default_filter); 
EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);

#endif /* CONFIG_PCI */



EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);

EXPORT_SYMBOL_GPL(ata_ehi_push_desc);

EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);

EXPORT_SYMBOL_GPL(ata_eng_timeout);

EXPORT_SYMBOL_GPL(ata_port_schedule_eh);

EXPORT_SYMBOL_GPL(ata_port_abort);

drivers/ata/libata-eh.c

+190 −14
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ enum { 
 */

enum {

	ATA_EH_PRERESET_TIMEOUT		= 10 * HZ,

	ATA_EH_FASTDRAIN_INTERVAL	= 3 * HZ,

};



/* The following table determines how we sequence resets.  Each entry
@@ -85,6 +86,71 @@ static void ata_eh_handle_port_resume(struct ata_port *ap) 
{ }

#endif /* CONFIG_PM */



static void __ata_ehi_pushv_desc(struct ata_eh_info *ehi, const char *fmt,

				 va_list args)

{

	ehi->desc_len += vscnprintf(ehi->desc + ehi->desc_len,

				     ATA_EH_DESC_LEN - ehi->desc_len,

				     fmt, args);

}



/**

 *	__ata_ehi_push_desc - push error description without adding separator

 *	@ehi: target EHI

 *	@fmt: printf format string

 *

 *	Format string according to @fmt and append it to @ehi->desc.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 */

void __ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)

{

	va_list args;



	va_start(args, fmt);

	__ata_ehi_pushv_desc(ehi, fmt, args);

	va_end(args);

}



/**

 *	ata_ehi_push_desc - push error description with separator

 *	@ehi: target EHI

 *	@fmt: printf format string

 *

 *	Format string according to @fmt and append it to @ehi->desc.

 *	If @ehi->desc is not empty, ", " is added in-between.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 */

void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)

{

	va_list args;



	if (ehi->desc_len)

		__ata_ehi_push_desc(ehi, ", ");



	va_start(args, fmt);

	__ata_ehi_pushv_desc(ehi, fmt, args);

	va_end(args);

}



/**

 *	ata_ehi_clear_desc - clean error description

 *	@ehi: target EHI

 *

 *	Clear @ehi->desc.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 */

void ata_ehi_clear_desc(struct ata_eh_info *ehi)

{

	ehi->desc[0] = '\0';

	ehi->desc_len = 0;

}



static void ata_ering_record(struct ata_ering *ering, int is_io,

			     unsigned int err_mask)

{
@@ -296,6 +362,9 @@ void ata_scsi_error(struct Scsi_Host *host) 
 repeat:

	/* invoke error handler */

	if (ap->ops->error_handler) {

		/* kill fast drain timer */

		del_timer_sync(&ap->fastdrain_timer);



		/* process port resume request */

		ata_eh_handle_port_resume(ap);
@@ -511,6 +580,94 @@ void ata_eng_timeout(struct ata_port *ap) 
	DPRINTK("EXIT\n");

}



static int ata_eh_nr_in_flight(struct ata_port *ap)

{

	unsigned int tag;

	int nr = 0;



	/* count only non-internal commands */

	for (tag = 0; tag < ATA_MAX_QUEUE - 1; tag++)

		if (ata_qc_from_tag(ap, tag))

			nr++;



	return nr;

}



void ata_eh_fastdrain_timerfn(unsigned long arg)

{

	struct ata_port *ap = (void *)arg;

	unsigned long flags;

	int cnt;



	spin_lock_irqsave(ap->lock, flags);



	cnt = ata_eh_nr_in_flight(ap);



	/* are we done? */

	if (!cnt)

		goto out_unlock;



	if (cnt == ap->fastdrain_cnt) {

		unsigned int tag;



		/* No progress during the last interval, tag all

		 * in-flight qcs as timed out and freeze the port.

		 */

		for (tag = 0; tag < ATA_MAX_QUEUE - 1; tag++) {

			struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);

			if (qc)

				qc->err_mask |= AC_ERR_TIMEOUT;

		}



		ata_port_freeze(ap);

	} else {

		/* some qcs have finished, give it another chance */

		ap->fastdrain_cnt = cnt;

		ap->fastdrain_timer.expires =

			jiffies + ATA_EH_FASTDRAIN_INTERVAL;

		add_timer(&ap->fastdrain_timer);

	}



 out_unlock:

	spin_unlock_irqrestore(ap->lock, flags);

}



/**

 *	ata_eh_set_pending - set ATA_PFLAG_EH_PENDING and activate fast drain

 *	@ap: target ATA port

 *	@fastdrain: activate fast drain

 *

 *	Set ATA_PFLAG_EH_PENDING and activate fast drain if @fastdrain

 *	is non-zero and EH wasn't pending before.  Fast drain ensures

 *	that EH kicks in in timely manner.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 */

static void ata_eh_set_pending(struct ata_port *ap, int fastdrain)

{

	int cnt;



	/* already scheduled? */

	if (ap->pflags & ATA_PFLAG_EH_PENDING)

		return;



	ap->pflags |= ATA_PFLAG_EH_PENDING;



	if (!fastdrain)

		return;



	/* do we have in-flight qcs? */

	cnt = ata_eh_nr_in_flight(ap);

	if (!cnt)

		return;



	/* activate fast drain */

	ap->fastdrain_cnt = cnt;

	ap->fastdrain_timer.expires = jiffies + ATA_EH_FASTDRAIN_INTERVAL;

	add_timer(&ap->fastdrain_timer);

}



/**

 *	ata_qc_schedule_eh - schedule qc for error handling

 *	@qc: command to schedule error handling for
@@ -528,7 +685,7 @@ void ata_qc_schedule_eh(struct ata_queued_cmd *qc) 
	WARN_ON(!ap->ops->error_handler);



	qc->flags |= ATA_QCFLAG_FAILED;

	qc->ap->pflags |= ATA_PFLAG_EH_PENDING;

	ata_eh_set_pending(ap, 1);



	/* The following will fail if timeout has already expired.

	 * ata_scsi_error() takes care of such scmds on EH entry.
@@ -555,7 +712,7 @@ void ata_port_schedule_eh(struct ata_port *ap) 
	if (ap->pflags & ATA_PFLAG_INITIALIZING)

		return;



	ap->pflags |= ATA_PFLAG_EH_PENDING;

	ata_eh_set_pending(ap, 1);

	scsi_schedule_eh(ap->scsi_host);



	DPRINTK("port EH scheduled\n");
@@ -579,6 +736,9 @@ int ata_port_abort(struct ata_port *ap) 


	WARN_ON(!ap->ops->error_handler);



	/* we're gonna abort all commands, no need for fast drain */

	ata_eh_set_pending(ap, 0);



	for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {

		struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);
@@ -1130,7 +1290,7 @@ static void ata_eh_analyze_ncq_error(struct ata_port *ap) 
	/* we've got the perpetrator, condemn it */

	qc = __ata_qc_from_tag(ap, tag);

	memcpy(&qc->result_tf, &tf, sizeof(tf));

	qc->err_mask |= AC_ERR_DEV;

	qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ;

	ehc->i.err_mask &= ~AC_ERR_DEV;

}
@@ -1413,8 +1573,12 @@ static void ata_eh_autopsy(struct ata_port *ap) 
	if (rc == 0) {

		ehc->i.serror |= serror;

		ata_eh_analyze_serror(ap);

	} else if (rc != -EOPNOTSUPP)

	} else if (rc != -EOPNOTSUPP) {

		/* SError read failed, force hardreset and probing */

		ata_ehi_schedule_probe(&ehc->i);

		ehc->i.action |= ATA_EH_HARDRESET;

		ehc->i.err_mask |= AC_ERR_OTHER;

	}



	/* analyze NCQ failure */

	ata_eh_analyze_ncq_error(ap);
@@ -1524,14 +1688,14 @@ static void ata_eh_report(struct ata_port *ap) 
			       ehc->i.err_mask, ap->sactive, ehc->i.serror,

			       ehc->i.action, frozen);

		if (desc)

			ata_dev_printk(ehc->i.dev, KERN_ERR, "(%s)\n", desc);

			ata_dev_printk(ehc->i.dev, KERN_ERR, "%s\n", desc);

	} else {

		ata_port_printk(ap, KERN_ERR, "exception Emask 0x%x "

				"SAct 0x%x SErr 0x%x action 0x%x%s\n",

				ehc->i.err_mask, ap->sactive, ehc->i.serror,

				ehc->i.action, frozen);

		if (desc)

			ata_port_printk(ap, KERN_ERR, "(%s)\n", desc);

			ata_port_printk(ap, KERN_ERR, "%s\n", desc);

	}



	for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
@@ -1551,7 +1715,7 @@ static void ata_eh_report(struct ata_port *ap) 
			"cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "

			"tag %d cdb 0x%x data %u %s\n         "

			"res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "

			"Emask 0x%x (%s)\n",

			"Emask 0x%x (%s)%s\n",

			cmd->command, cmd->feature, cmd->nsect,

			cmd->lbal, cmd->lbam, cmd->lbah,

			cmd->hob_feature, cmd->hob_nsect,
@@ -1562,7 +1726,8 @@ static void ata_eh_report(struct ata_port *ap) 
			res->lbal, res->lbam, res->lbah,

			res->hob_feature, res->hob_nsect,

			res->hob_lbal, res->hob_lbam, res->hob_lbah,

			res->device, qc->err_mask, ata_err_string(qc->err_mask));

			res->device, qc->err_mask, ata_err_string(qc->err_mask),

			qc->err_mask & AC_ERR_NCQ ? " <F>" : "");

	}

}
@@ -1648,7 +1813,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
			} else

				ata_port_printk(ap, KERN_ERR,

					"prereset failed (errno=%d)\n", rc);

			return rc;

			goto out;

		}

	}
@@ -1661,7 +1826,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
		/* prereset told us not to reset, bang classes and return */

		for (i = 0; i < ATA_MAX_DEVICES; i++)

			classes[i] = ATA_DEV_NONE;

		return 0;

		rc = 0;

		goto out;

	}



	/* did prereset() screw up?  if so, fix up to avoid oopsing */
@@ -1697,7 +1863,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
			ata_port_printk(ap, KERN_ERR,

					"follow-up softreset required "

					"but no softreset avaliable\n");

			return -EINVAL;

			rc = -EINVAL;

			goto out;

		}



		ata_eh_about_to_do(ap, NULL, ATA_EH_RESET_MASK);
@@ -1707,7 +1874,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
		    classes[0] == ATA_DEV_UNKNOWN) {

			ata_port_printk(ap, KERN_ERR,

					"classification failed\n");

			return -EINVAL;

			rc = -EINVAL;

			goto out;

		}

	}
@@ -1724,7 +1892,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
			schedule_timeout_uninterruptible(delta);

		}



		if (reset == hardreset &&

		if (rc == -EPIPE ||

		    try == ARRAY_SIZE(ata_eh_reset_timeouts) - 1)

			sata_down_spd_limit(ap);

		if (hardreset)
@@ -1733,12 +1901,18 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
	}



	if (rc == 0) {

		u32 sstatus;



		/* After the reset, the device state is PIO 0 and the

		 * controller state is undefined.  Record the mode.

		 */

		for (i = 0; i < ATA_MAX_DEVICES; i++)

			ap->device[i].pio_mode = XFER_PIO_0;



		/* record current link speed */

		if (sata_scr_read(ap, SCR_STATUS, &sstatus) == 0)

			ap->sata_spd = (sstatus >> 4) & 0xf;



		if (postreset)

			postreset(ap, classes);
@@ -1746,7 +1920,9 @@ static int ata_eh_reset(struct ata_port *ap, int classify, 
		ata_eh_done(ap, NULL, ehc->i.action & ATA_EH_RESET_MASK);

		ehc->i.action |= ATA_EH_REVALIDATE;

	}



 out:

	/* clear hotplug flag */

	ehc->i.flags &= ~ATA_EHI_HOTPLUGGED;

	return rc;

}

drivers/ata/libata-scsi.c

+47 −16

File changed.

Preview size limit exceeded, changes collapsed.

drivers/ata/libata-sff.c

+3 −1
Original line number Diff line number Diff line 
/*

 *  libata-bmdma.c - helper library for PCI IDE BMDMA

 *  libata-sff.c - helper library for PCI IDE BMDMA

 *

 *  Maintained by:  Jeff Garzik <jgarzik@pobox.com>

 *    		    Please ALWAYS copy linux-ide@vger.kernel.org
@@ -211,6 +211,8 @@ void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 
		tf->hob_lbal = ioread8(ioaddr->lbal_addr);

		tf->hob_lbam = ioread8(ioaddr->lbam_addr);

		tf->hob_lbah = ioread8(ioaddr->lbah_addr);

		iowrite8(tf->ctl, ioaddr->ctl_addr);

		ap->last_ctl = tf->ctl;

	}

}

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