Commit deca1d1c authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v5.6/fixes-rc4' of... 

Merge tag 'omap-for-v5.6/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.6-rc cycle

Few device tree fixes for various devices:

- A regression fix for non-existing can device on am534x-idk

- Fix missing dma-ranges for dra7 pcie

- Fix flakey wlan on droid4 where some devices would not connect
  at all because of internal pull being used with an external pull

- Fix occasional missed wake-up events on droid4 modem uart

* tag 'omap-for-v5.6/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1
  ARM: dts: omap4-droid4: Fix flakey wlan by disabling internal pull for gpio
  ARM: dts: dra7: Fix bus_dma_limit for PCIe
  ARM: dts: am574x-idk: Disable m_can node

Link: https://lore.kernel.org/r/pull-1588872844-804667@atomide.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3b3e88e0 738b150e

arch/arm/boot/dts/am574x-idk.dts

+4 −0
Original line number Diff line number Diff line
@@ -40,3 +40,7 @@ 
	status = "okay";

	dual_emac;

};



&m_can0 {

	status = "disabled";

};

arch/arm/boot/dts/dra7.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ 
			#address-cells = <1>;

			ranges = <0x51000000 0x51000000 0x3000

				  0x0	     0x20000000 0x10000000>;

			dma-ranges;

			/**

			 * To enable PCI endpoint mode, disable the pcie1_rc

			 * node and enable pcie1_ep mode.
@@ -185,7 +186,6 @@ 
				device_type = "pci";

				ranges = <0x81000000 0 0          0x03000 0 0x00010000

					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;

				dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;

				bus-range = <0x00 0xff>;

				#interrupt-cells = <1>;

				num-lanes = <1>;
@@ -230,6 +230,7 @@ 
			#address-cells = <1>;

			ranges = <0x51800000 0x51800000 0x3000

				  0x0	     0x30000000 0x10000000>;

			dma-ranges;

			status = "disabled";

			pcie2_rc: pcie@51800000 {

				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
@@ -240,7 +241,6 @@ 
				device_type = "pci";

				ranges = <0x81000000 0 0          0x03000 0 0x00010000

					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;

				dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;

				bus-range = <0x00 0xff>;

				#interrupt-cells = <1>;

				num-lanes = <1>;

arch/arm/boot/dts/motorola-mapphone-common.dtsi

+40 −3
Original line number Diff line number Diff line
@@ -367,6 +367,8 @@ 
};



&mmc3 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc3_pins>;

	vmmc-supply = <&wl12xx_vmmc>;

	/* uart2_tx.sdmmc3_dat1 pad as wakeirq */

	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
@@ -472,6 +474,37 @@ 
		>;

	};



	/*

	 * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3

	 * for gpio_100, but the internal pull makes wlan flakey on some

	 * devices. Off mode value should be tested if we have off mode working

	 * later on.

	 */

	mmc3_pins: pinmux_mmc3_pins {

		pinctrl-single,pins = <

		/* 0x4a10008e gpmc_wait2.gpio_100 d23 */

		OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)



		/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */

		OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)



		/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */

		OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)



		/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */

		OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)



		/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */

		OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)



		/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */

		OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)



		/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */

		OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)

		>;

	};



	/* gpmc_ncs0.gpio_50 */

	poweroff_gpio: pinmux_poweroff_pins {

		pinctrl-single,pins = <
@@ -690,14 +723,18 @@ 
};



/*

 * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for

 * uart1 wakeirq.

 * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149

 * for wake-up events for both the USB PHY and the UART. We can use gpio_149

 * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we

 * have gpio_149 trigger before the UART transfer starts.

 */

&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart1_pins>;

	interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH

			       &omap4_pmx_core 0xfc>;

			       &omap4_pmx_core 0x110>;

	uart-has-rtscts;

	current-speed = <115200>;

};



&uart3 {

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