Commit deac3d87 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper
Browse files

ARM: orion: switch to a per-platform handle_irq() function 



Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER
enabled, even for non-DT platforms (if we want both DT and non-DT
platforms to be supported in a single kernel).

However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT
platforms in plat-orion/irq.c doesn't match the needs of
Orion5x. Also, it doesn't make much sense for orion_irq_init() to
register the multi-IRQ handler: orion_irq_init() is called once for
each IRQ cause/mask tuple, while the multi-IRQ handler only needs to
be registered once.

To solve this problem, we move the multi-IRQ handle in per-platform
code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant
will be introduced in a followup commit. Of course, this code will
ultimately be completely removed once all boards are converted to the
Device Tree.

Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1398202002-28530-23-git-send-email-thomas.petazzoni@free-electrons.com


Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 0180ed45

arch/arm/mach-dove/irq.c

+36 −0
Original line number Diff line number Diff line
@@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = { 
	0,

};



#ifdef CONFIG_MULTI_IRQ_HANDLER

/*

 * Compiling with both non-DT and DT support enabled, will

 * break asm irq handler used by non-DT boards. Therefore,

 * we provide a C-style irq handler even for non-DT boards,

 * if MULTI_IRQ_HANDLER is set.

 */



static void __iomem *dove_irq_base = IRQ_VIRT_BASE;



static asmlinkage void

__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)

{

	u32 stat;



	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);

	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);

	if (stat) {

		unsigned int hwirq = __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);

	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);

	if (stat) {

		unsigned int hwirq = 32 + __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

}

#endif



void __init dove_init_irq(void)

{

	int i;
@@ -115,6 +147,10 @@ void __init dove_init_irq(void) 
	orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);

	orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);



#ifdef CONFIG_MULTI_IRQ_HANDLER

	set_handle_irq(dove_legacy_handle_irq);

#endif



	/*

	 * Initialize gpiolib for GPIOs 0-71.

	 */

arch/arm/mach-kirkwood/irq.c

+37 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */

#include <asm/exception.h>

#include <linux/gpio.h>

#include <linux/kernel.h>

#include <linux/irq.h>
@@ -30,11 +31,47 @@ static int __initdata gpio1_irqs[4] = { 
	0,

};



#ifdef CONFIG_MULTI_IRQ_HANDLER

/*

 * Compiling with both non-DT and DT support enabled, will

 * break asm irq handler used by non-DT boards. Therefore,

 * we provide a C-style irq handler even for non-DT boards,

 * if MULTI_IRQ_HANDLER is set.

 */



static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;



asmlinkage void

__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)

{

	u32 stat;



	stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);

	stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);

	if (stat) {

		unsigned int hwirq = __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

	stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);

	stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);

	if (stat) {

		unsigned int hwirq = 32 + __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

}

#endif



void __init kirkwood_init_irq(void)

{

	orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);

	orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);



#ifdef CONFIG_MULTI_IRQ_HANDLER

	set_handle_irq(kirkwood_legacy_handle_irq);

#endif



	/*

	 * Initialize gpiolib for GPIOs 0-49.

	 */

arch/arm/plat-orion/irq.c

+0 −45
Original line number Diff line number Diff line
@@ -20,47 +20,6 @@ 
#include <plat/orion-gpio.h>

#include <mach/bridge-regs.h>



#ifdef CONFIG_MULTI_IRQ_HANDLER

/*

 * Compiling with both non-DT and DT support enabled, will

 * break asm irq handler used by non-DT boards. Therefore,

 * we provide a C-style irq handler even for non-DT boards,

 * if MULTI_IRQ_HANDLER is set.

 *

 * Notes:

 * - this is prepared for Kirkwood and Dove only, update

 *   accordingly if you add Orion5x or MV78x00.

 * - Orion5x uses different macro names and has only one

 *   set of CAUSE/MASK registers.

 * - MV78x00 uses the same macro names but has a third

 *   set of CAUSE/MASK registers.

 *

 */



static void __iomem *orion_irq_base = IRQ_VIRT_BASE;



asmlinkage void

__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)

{

	u32 stat;



	stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);

	stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);

	if (stat) {

		unsigned int hwirq = __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

	stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);

	stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);

	if (stat) {

		unsigned int hwirq = 32 + __fls(stat);

		handle_IRQ(hwirq, regs);

		return;

	}

}

#endif



void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)

{

	struct irq_chip_generic *gc;
@@ -78,10 +37,6 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) 
	ct->chip.irq_unmask = irq_gc_mask_set_bit;

	irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,

			       IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);



#ifdef CONFIG_MULTI_IRQ_HANDLER

	set_handle_irq(orion_legacy_handle_irq);

#endif

}



#ifdef CONFIG_OF

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